Browse Prior Art Database

A Sensitive Capacitance Measurement for Semiconductor Device

IP.com Disclosure Number: IPCOM000038188D
Original Publication Date: 1989-Dec-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Hwang, TT: AUTHOR

Abstract

Disclosed is a technique to measure physical semiconductor device capacitance accurately. The technique enables one to measure capacitance in femto (10-15) Farad resolution.

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A Sensitive Capacitance Measurement for Semiconductor Device

Disclosed is a technique to measure physical semiconductor device capacitance accurately. The technique enables one to measure capacitance in femto (10-15) Farad resolution.

The VLSI semiconductor device capacitances are in the order of tens femto Farad range. To directly measure this small value of capacitance is very difficult, if not impossible. This is because the magnitude of set-up stray capacitance, which is imbedded in the measurement, is usually much larger than the one measured. Thus, the capacitance measured is Cm = Cr + Cs, where Cm is the measurement capacitance,

Cr is the real device capacitance,

and Cs is the set-up stray capacitance.

Instead of measuring the device capacitance once as in the above equation, an additional measurement with two devices in parallel is required. The second capacitance measured is Cmm = 2Cr + Cs.

The real device capacitance can then be obtained by a simple subtraction of two measurements, i.e., Cr = Cmm - Cm.

The capacitance measured using this technique has no set-up stray capacitance involved. The resolution of measurement accuracy is only limited by the capacitor meter used.

Disclosed anonymously.

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