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Browse Prior Art Database

Bidirectional Encoder

IP.com Disclosure Number: IPCOM000038350D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 3 page(s) / 39K

Publishing Venue

IBM

Related People

Williams, RA: AUTHOR

Abstract

Counting logic is disclosed which eliminates counting errors usually associated with direction-of-motion changes that occur very close to a count decode time. A bidirectional encoder is used to track the position of a movable element. The encoder's two 90Πshifted output signals are decoded to provide position information. These two signals are processed by a logic network, and the output of this network drives an up/down counter. At any given time, the count within the counter is an indication of the position of the movable element. The two encoder signals 10 and 11 are applied to 7474-type flip- flops 12 and 13, respectively. These two flip-flops are connected to similar-type flip-flops 14 and 15.

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Bidirectional Encoder

Counting logic is disclosed which eliminates counting errors usually associated with direction-of-motion changes that occur very close to a count decode time. A bidirectional encoder is used to track the position of a movable element. The encoder's two 90OE shifted output signals are decoded to provide position information. These two signals are processed by a logic network, and the output of this network drives an up/down counter. At any given time, the count within the counter is an indication of the position of the movable element. The two encoder signals 10 and 11 are applied to 7474-type flip- flops 12 and 13, respectively. These two flip-flops are connected to similar-type flip-flops 14 and 15. Two high frequency clock signals 16 and 17, which are 90OE displaced, gate the four flip-flops, and two AND gates 18 and 19, respectively. This logic network is constructed to count on negative-going transitions of signal 10, for example, transitions 20 and 21 when motion is to the right, and positive-going transitions of signal 10 when motion is to the left. Assume that the encoder is stationary at the position indicated as T1. The operation of clock signal 16 causes all four flip-flops to be in a reset state. In this case, neither AND gate is enabled, and the pulses of clock 17 do not increment or decrement counter 22. Now assume that the encoder moves to position T2. During this movement, and as the positive-going transition 23 of signal 10 is encountered, the next pulse of high frequency clock signal 16 causes flip-flop 12 to be set, as the other three flip-flops remain reset. The next pulse of clock 16 sets flip-flop 14. The AND gates remain inhibited. Similarly, when the positive-going transition 24 of signal 11 is encountered, flip-flop 13 is set by a pu...