Browse Prior Art Database

MORPHIC Processing of Large Images Without an IMAGE Buffer

IP.com Disclosure Number: IPCOM000038364D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 5 page(s) / 79K

Publishing Venue

IBM

Related People

Jaffe, RS: AUTHOR [+2]

Abstract

Using available processing elements as auxiliary image storage permits a configurable parallel pipeline image processor to operate with an image buffer of minimal size, or even to operate without an image buffer. Image processing systems generally require an image buffer with one or more frames at least as large as the image when more than one processing pass of the images through the processing element array is required. This is necessary, since the accumulating partial answer has to be held somewhere, usually in the memory area which the original image is gradually vacating as it is passed through the processing stages.

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MORPHIC Processing of Large Images Without an IMAGE Buffer

Using available processing elements as auxiliary image storage permits a configurable parallel pipeline image processor to operate with an image buffer of minimal size, or even to operate without an image buffer. Image processing systems generally require an image buffer with one or more frames at least as large as the image when more than one processing pass of the images through the processing element array is required. This is necessary, since the accumulating partial answer has to be held somewhere, usually in the memory area which the original image is gradually vacating as it is passed through the processing stages. The requirement of a large image buffer size is reduced by using an image buffer of any frame size (including zero) while simultaneously using some of the power of (possibly idle) processing elements to provide the function of some or all of the image buffer. A configurable parallel pipeline image processing system has an array of processing elements which is configured for efficient use of the system. This configurability may leave a finite number of processing elements unused. A variable number of the processing elements

(Image Omitted)

(PEs) in the configurable parallel pipeline image processing system may be used as replacements for some or all of each of the image (frame) buffers. In so doing, larger images can be accommodated than by the image (frame) buffers themselves. Fig. 1 shows a reconfigurable arrangement of PEs which can recirculate and process images a multiple number of times if the images can be held in the frames of an image buffer. Large images (i.e., larger than the size of the provided image buffer) can also be processed, but only in a single pass, taking any number of processing steps up to the number of PEs in hardware. Fig. 1 shows in bold lines a gate (GT) 21, inserted under the control of the control (CC) 1 over lines 22, to control the flow of images from the image collection device on lines 13, or, alternatively, returning image information from the image processing system PEs on lines 8 into M 7 over lines 8a. Lines 8a are logically equivalent to the old lines 8 (shown in broken lines) which are eliminated. CC 1 is provided the additional ability to count the number of pel (picture element) time clocks and to activate GT 21 over line 22 in order to switch from the first image collection stream to the second image return stream at the time when a given count is reached. Some variable number of the PEs in some of the processing element groups (PEGs) 10 will be allocated as required, not to processing, but to delaying the image in time without alteration. Thus these PEs will provide in their own internal memory (necessarily required in order to allow PE to perform image processing functions) the memory which is lacking in the image buffer memory M 7 of Fig. 1. Thus it is possible to operate with the size of the frame of the image...