Browse Prior Art Database

Dynamic Memory Refresh Control for Long but Finite Computer Operations

IP.com Disclosure Number: IPCOM000038423D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Sotolongo, H: AUTHOR

Abstract

A technique is described whereby the dynamic memory refresh operation within a computer storage control unit is controlled by counter circuitry to provide an increase in the overall processing speed of the computer. Refresh operations are not possible during operations in which storage access resources are at capacity limits. The subject technique retains the number of outstanding memory refresh requests in a counter, so that the refreshes will occur back to back when the long memory operation is complete. In the prior art, dynamic memory refresh operations required that the portion of memory being refreshed be termed as busy and therefore that portion of memory was inaccessible for use until the refresh was complete.

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Dynamic Memory Refresh Control for Long but Finite Computer Operations

A technique is described whereby the dynamic memory refresh operation within a computer storage control unit is controlled by counter circuitry to provide an increase in the overall processing speed of the computer. Refresh operations are not possible during operations in which storage access resources are at capacity limits. The subject technique retains the number of outstanding memory refresh requests in a counter, so that the refreshes will occur back to back when the long memory operation is complete. In the prior art, dynamic memory refresh operations required that the portion of memory being refreshed be termed as busy and therefore that portion of memory was inaccessible for use until the refresh was complete. It was not uncommon to have refresh operations preempt other "work producing" operations in an arbitrary manner. As a result, some system performance was lost during this time. When long but finite operations are encountered, the time to service a refresh operation can be excessively long. The concept described herein provides a means of increasing system performance by storing information relating to how many refresh requests become due during long but finite operations and execute them in back to back fashion, possibly in a time slot when storage resources are not required for any other operation. Refreshing is performed on single memory rows so that different rows periodically...