Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Field-Effect Transistor Complementary Logic Gate

IP.com Disclosure Number: IPCOM000038449D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Kiehl, RA: AUTHOR

Abstract

Field-effect transistors (FETs) with n and p channels may be integrated on the same wafer without degrading device performance by using a three-layer n-GaAs/p-AlGaAs/i-GaAs heterostructure substrate wherein the p-AlGaAs layer forms an integral part of both the p and n channel devices and the gate is formed employing self-aligned ion implantation. The principle is shown in the figure for the "NOT" gate involving an n-MESFET and a p-MODFET as an illustration. The gates 1 and 2 serve as masks for the source and drain implantations and the n-GaAs layer ends before the p-device, permitting a common electrode Vo to extend over the end of the layer.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Field-Effect Transistor Complementary Logic Gate

Field-effect transistors (FETs) with n and p channels may be integrated on the same wafer without degrading device performance by using a three-layer n- GaAs/p-AlGaAs/i-GaAs heterostructure substrate wherein the p-AlGaAs layer forms an integral part of both the p and n channel devices and the gate is formed employing self-aligned ion implantation. The principle is shown in the figure for the "NOT" gate involving an n-MESFET and a p-MODFET as an illustration. The gates 1 and 2 serve as masks for the source and drain implantations and the n- GaAs layer ends before the p-device, permitting a common electrode Vo to extend over the end of the layer. A major advantage of this structure over recessed-gate structures is that the p-channel may be designed to be non- conducting everywhere in the structure, thereby eliminating unwanted capacitive effects.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]