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Method to Cause State Changes in Single Facility, Sub-Area or Entire Input/Output Hierarchy

IP.com Disclosure Number: IPCOM000038454D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 3 page(s) / 44K

Publishing Venue

IBM

Related People

Bourke, DG: AUTHOR [+3]

Abstract

This article describes a method used in the input/output I/O subsystem of a data processing system that causes state changes in a single facility, sub-area, or entire I/O hierarchy while preserving the view of immediate execution by the processor program. Fig. 1 depicts a multi-level I/O hierarchy. Such hierarchies are (Image Omitted) normally balanced with respect to addressability, but unbalanced in actual implementation. To accommodate unbalanced implementations, it is desirable to have the branch ends of the hierarchy, specifically the target devices of I/O commands, residing at different levels of the hierarchy. Therefore, an I/O address is provided which specifies at what level the end target resides. The I/O address is shown in Fig. 2.

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Method to Cause State Changes in Single Facility, Sub-Area or Entire Input/Output Hierarchy

This article describes a method used in the input/output I/O subsystem of a data processing system that causes state changes in a single facility, sub-area, or entire I/O hierarchy while preserving the view of immediate execution by the processor program. Fig. 1 depicts a multi-level I/O hierarchy. Such hierarchies are

(Image Omitted)

normally balanced with respect to addressability, but unbalanced in actual implementation. To accommodate unbalanced implementations, it is desirable to have the branch ends of the hierarchy, specifically the target devices of I/O commands, residing at different levels of the hierarchy. Therefore, an I/O address is provided which specifies at what level the end target resides. The I/O address is shown in Fig. 2. Four address fields are provided, corresponding to the four levels of the hierarchy. A target level code (TLC) in the address specifies the level of the target. If the TLC specifies, say, level 2, then the target is at level 2. The level 3 address field is not used, and the address fields for level 0 and 1 are the addresses of intermediate facilities in the routing path from the processor to the end target.

This addressing method maintains the view of point-to-point communication with the target by providing for transparency of the intermediate facilities to target specific commands. Intermediate facilities perform command routing, buffering, and maintenance of configuration tables, but otherwise do not take any action on behalf of lower levels which would affect their transparency. For normal operation, a point-to-point view of I/O targets is useful. On occasions when outages occur or when the I/O subsystem is reconfigured, entire sub-areas of the hierarchy may be affected. On such occasions, the use of point-to-point commands is cumbersome. Furthermore, point-to-point commands generally involve quick release of the processor upon passing the command to the highest level of the I/O hierarchy, with the reporting of command completion by means of interrupts. If they were used for commanding sub-areas, excessive and unnecessary interrupt activity would result. Therefore, a set of commands, called inclusive immediate commands, are defined to cause state changes in entire sub-areas. In addition, they provide the initiating program with a view of immediate execution to reduce the number of commands, delays in execution, and interrupt overhead. The facility at the top node of a target sub-area is considered to be the end target. It is addressed by means of the TLC in the I/O address, using the same address conventions established with point- to-point commun...