Browse Prior Art Database

Bipolar Transistor With Built-In Barrier Diode

IP.com Disclosure Number: IPCOM000038466D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Ning, TH: AUTHOR

Abstract

This article relates generally to integrated circuit fabrication and, more particularly, to the construction of a buried collector-base clamp to prevent transistor saturation. The provision of a buried collector-base diode clamp, while preventing transistor saturation, does not require wafer surface area or block wiring channels. Construction steps of a bipolar transistor with buried Schottky barrier diode are shown in the figures. In Fig. 1, a p- substrate 1 having an n+ subcollector layer 2 with n epitaxial layer 3 has isolation trenches 4 and recessed field oxide 5 formed therein.

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Bipolar Transistor With Built-In Barrier Diode

This article relates generally to integrated circuit fabrication and, more particularly, to the construction of a buried collector-base clamp to prevent transistor saturation. The provision of a buried collector-base diode clamp, while preventing transistor saturation, does not require wafer surface area or block wiring channels. Construction steps of a bipolar transistor with buried Schottky barrier diode are shown in the figures. In Fig. 1, a p- substrate 1 having an n+ subcollector layer 2 with n epitaxial layer 3 has isolation trenches 4 and recessed field oxide 5 formed therein.

A refractory metal layer 6 of tungsten, molybdenum or titanium nitride is deposited on layer 3 to form the Schottky barrier diode. Diffusion barrier layer 7, polysilicon layer 8 doped with boron and an insulator 9 of oxide or oxide/nitride composite are added. Layer 7 prevents boron from diffusing through metal layer 6 and may be either a conductor or insulator. Using a single mask step, insulator 9, polysilicon 8, diffusion barrier 7, and metal layer 6 are etched to n epitaxial layer 3, leaving those layers unetched but undercut over the extrinsic base region 10 and barrier diode region 11, as seen in Fig. 2. Thereafter, undoped polysilicon 12 is deposited and selectively removed by reactive ion etching to form sidewalls 12 in the undercut regions. A thin oxide layer is grown on the exposed silicon and oxide 13 deposited and etched by r...