Browse Prior Art Database

Frame Switching Node Vertical Task Distribution

IP.com Disclosure Number: IPCOM000038473D
Original Publication Date: 1987-Jan-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Blanc, A: AUTHOR [+2]

Abstract

This mechanism is used in a high performance network composed of traditionnal network access nodes connected through one or several frame switching nodes (FSN) which realize the network transit function. The main characteristics of the FSN are: . Multiplexing of HDLC (high level data link control) frames of variable length. . Routing of the incoming HDLC frame to the selected output line according to the routing tag information included in the transmission header of each frame. . No error recovery. Frame drop in case of overflow. The system is made to interconnect any couple of terminals respectively attached to lines L1 to Ln for transferring data through lines adapters (LAs) and a data transfer system. The data are transferred frame by frame.

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Frame Switching Node Vertical Task Distribution

This mechanism is used in a high performance network composed of traditionnal network access nodes connected through one or several frame switching nodes (FSN) which realize the network transit function. The main characteristics of the FSN are: . Multiplexing of HDLC (high level data link control) frames of variable length. . Routing of the incoming HDLC frame to the selected output line according to the routing tag

information included in the transmission header of

each frame. . No error recovery. Frame drop in case of overflow. The system is made to interconnect any couple of terminals respectively attached to lines L1 to Ln for transferring data through lines adapters (LAs) and a data transfer system. The data are transferred frame by frame. In order to get high performance in terms of frames per second and of line speed, the tasks are arranged vertically into bit level (level
1), frame level (level 2) and supervision level (level 3). The various frame contents are, generally speaking, transparent to the FSN. Also, while intelligence increases from bit level up to supervision level, operating speed decreases. In operation, at bit level, the following operations are performed: frame acquisition, validity checking, abort checking, and control of data transfers through the data transfer system. The system being transparent, the Managing (MANAG.) Processor never sees the bits to be transferred between two attached te...