Browse Prior Art Database

Diagnostic/Videotex Clocking Technique

IP.com Disclosure Number: IPCOM000038560D
Original Publication Date: 1987-Feb-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Freeman, WA: AUTHOR [+3]

Abstract

The design of the IBM RT PC Multi-Protocol Communications Adapter uses a communications controller chip that has two independent channels. Each channel contains a Baud Rate Generator (BRG) used to generate clock signals for transmission and reception of data. This method provides a hardware path such that the BRG output from one channel can be gated into the clock input of the opposite channel and provides for effective diagnostic capability as well as a functional option that can be used in a real application. The method uses an external gating structure, shown above, to provide the output clock signal of one channel to be connected to the input clock signal of the opposite channel.

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Diagnostic/Videotex Clocking Technique

The design of the IBM RT PC Multi-Protocol Communications Adapter uses a communications controller chip that has two independent channels. Each channel contains a Baud Rate Generator (BRG) used to generate clock signals for transmission and reception of data. This method provides a hardware path such that the BRG output from one channel can be gated into the clock input of the opposite channel and provides for effective diagnostic capability as well as a functional option that can be used in a real application. The method uses an external gating structure, shown above, to provide the output clock signal of one channel to be connected to the input clock signal of the opposite channel. This allows the BRG output of channel A to be used as a receive clock by channel B or the BRG output of channel B to be used as a receive clock by channel A. This provides the capability of testing the clock input of each channel for diagnostic reasons, but an additional function is provided. The capability of independent clock generation for transmit and receive is a requirement for some videotex networks. These networks transmit data at one data rate and receive data at another data rate with all clocking generated by the communications adapter itself. This design allows both the diagnostic requirements to be met as well as the capability of videotex support.

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