Browse Prior Art Database

Flexible Memory CARD Address Decoder for Computer System

IP.com Disclosure Number: IPCOM000038660D
Original Publication Date: 1987-Feb-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 3 page(s) / 34K

Publishing Venue

IBM

Related People

Fuoco, D: AUTHOR [+3]

Abstract

A technique is described whereby memory circuit cards of varying capacities and types may be used in computer systems through the use of a flexible address decoder. The decoder provides flexibility to enable the intermixing of memory circuit cards of varying capacities without any deterioration in performance. The concept, described herein, enables computer processors to have the ability to intermix memory circuit cards of 1-megabyte, 2-megabyte and 4-megabyte capacities. In the prior art, all of the memory cards had to be of the same capacity and type. The address decoder, as shown in the block diagram, uses a set of instructions through the use of an identifier (ID) to permit access to each memory card and to ascertain the capacity of the memory card.

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Flexible Memory CARD Address Decoder for Computer System

A technique is described whereby memory circuit cards of varying capacities and types may be used in computer systems through the use of a flexible address decoder. The decoder provides flexibility to enable the intermixing of memory circuit cards of varying capacities without any deterioration in performance. The concept, described herein, enables computer processors to have the ability to intermix memory circuit cards of 1-megabyte, 2-megabyte and 4-megabyte capacities. In the prior art, all of the memory cards had to be of the same capacity and type. The address decoder, as shown in the block diagram, uses a set of instructions through the use of an identifier (ID) to permit access to each memory card and to ascertain the capacity of the memory card. The ID determines the capacity of the card through the use of input storage card identifier (SCID) 10 for the following four conditions: Card Identity Assigned ID Code No card plugged 00; . 1 MB CARD PLUGGED 01; . 2 MB CARD PLUGGED 10; . 4 MB CARD PLUGGED 11; Identifier decode (IDDEC) 11 block receives the ID code and de codes the ID into sixteen 4-bit fields representing a one-megabyte range of addresses, one range for each one-megabyte bank. Each of the range fields will assume different address values depending on the storage cards plugged and configured in the system. A card may be plugged in but not configured if a specific code is loaded into the storage card ID register. The output of this register is used to feed block IDDEC; therefore, it would perform as if no card were plugged into the slot. Typically, this is what takes place when an error is detected in one of the storage cards. Bank Enable (BNKENB) 12 block serves to enable or disable a comparison of the corresponding range signal fields with the four most significant bits of the...