Browse Prior Art Database

System Power Savings by Automatic Sleep Mode

IP.com Disclosure Number: IPCOM000038699D
Original Publication Date: 1987-Feb-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Bhansali, MM: AUTHOR [+3]

Abstract

This article describes a technique which conserves microcomputer power by using special low power consumption modes of operation when the computer system is inactive. This is accomplished by inclusion of plural "sleep modes" wherein the system clock is either stopped or operated at a reduced rate, provision of system instructions for in ducing these modes and use of interrupt facilities responsive to external events to return the system to its active "awake mode". The technique disclosed herein takes advantage of the fact that system power in a microcomputer environment is directly proportional to the speed of the system clock. In a battery-powered environment where most logic is complementary metal-oxide-semiconductor (CMOS), this is especially true.

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System Power Savings by Automatic Sleep Mode

This article describes a technique which conserves microcomputer power by using special low power consumption modes of operation when the computer system is inactive. This is accomplished by inclusion of plural "sleep modes" wherein the system clock is either stopped or operated at a reduced rate, provision of system instructions for in ducing these modes and use of interrupt facilities responsive to external events to return the system to its active "awake mode". The technique disclosed herein takes advantage of the fact that system power in a microcomputer environment is directly proportional to the speed of the system clock. In a battery-powered environment where most logic is complementary metal-oxide-semiconductor (CMOS), this is especially true. If the clock can be operated at a slower speed or even stopped, then system power will be saved. This method provides for an automatic way to do this transparently from the user viewpoint. It is called "sleep mode". It also takes advantage of the fact that the majority of the system time is spent waiting for a keyboard response from the user. The sleep mode is entered during this system idle time, thus saving power without affecting system performance. There are two system clocks needed. They are called SYSCK and SLEEPCK. Those functions which interface directly to the user, such as the display and keyboard, and require a clock for operation will use SYSCK. This clock is a continuously operating clock which runs at the full system speed, such a 4 MHz. By operating these functions from SYSCK, these devices will always be fully functional and can exist in a mode that does not require direct processor support. The second system clock SLEEPCK is connected to the processor, direct memory access (DMA) support, and all other supporting logic. There are two modes of operation for this clock signal as follows: The first mode is created by an OUT instruction which changes this system clock speed. There are three speeds which can be created: high, medium and low. This can be initialized at any time by a program for power savings. This can be set by an application where appropriate in order to save power. It would be most appropriate for applications which do a background polling type of operation. The second...