Browse Prior Art Database

ERROR Detection in Space Switches

IP.com Disclosure Number: IPCOM000038706D
Original Publication Date: 1987-Feb-01
Included in the Prior Art Database: 2005-Jan-31
Document File: 5 page(s) / 59K

Publishing Venue

IBM

Related People

Ancheta, TC: AUTHOR [+3]

Abstract

This article describes a method of detecting errors in a space switch arising from faults in one or more input or output lines. In the disclosed technique, knowledge of the permutation function performed by the switch is not required. A space switch is a device that maps an input binary n-tuple to an output binary n-tuple such that the output vector is a permutation of the digits of the input vector. It can be shown that there are exactly n! distinct such permutations so that the space switch is simply a device that implements one such function in a given time. For any binary vector V = (v1, v2, ....vn), let W(V) be the Hamming weight, i.e., the number of non-zero digits in V. A permutation matrix P is a non-singular n by n square matrix with binary elements where each row and column has a weight of exactly one.

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ERROR Detection in Space Switches

This article describes a method of detecting errors in a space switch arising from faults in one or more input or output lines. In the disclosed technique, knowledge of the permutation function performed by the switch is not required. A space switch is a device that maps an input binary n-tuple to an output binary n-tuple such that the output vector is a permutation of the digits of the input vector. It can be shown that there are exactly n! distinct such permutations so that the space switch is simply a device that implements one such function in a given time. For any binary vector V = (v1, v2, ....vn), let W(V) be the Hamming weight, i.e., the number of non-zero digits in V. A permutation matrix P is a non-singular n by n square matrix with binary elements where each row and column has a weight of exactly one. For some permutation matrix P, the switch output Y is seen to be formed from the switch input X with the matrix operation Y = PX, where addition and multiplication are operations over the binary field GF(2). It can be seen that for every such matrix P, there exists an inverse P-1 which is itself a permutation matrix. Thus, under normal conditions, one can

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extract the input X = P-1Y from the switch output vector Y. It should be clear that W(Y) = W(PX) = W(X) for any such permutation matrix P. Let f(a,b,c, ...) be a Boolean function of the binary inputs a, b,c. We define the vector V = f(A,B,C, ...) to be one whose ith element vi = f(ai,bi,ci, ...) is the binary element formed from the ith components of the input vectors A,B,C. For all j = 1,2, .. and Yj = PXj, it follows that f(Y1, Y2, ...) = Pf(X1, X2, ...) for any Boolean function f. In particular, let A + B be the vector formed in the exclusive OR of the respective components of the arguments A and B. For some integer T, the switch is assumed to be periodic, of period T so that the switch implements the same permutation function Pt = Pt+T for any time t and t + T. Then, the vector Xt + Xt+T , FORMED FROM THE EXCLUSIVE SUM of Xt and Xt+T, satisfies Yt + Yt+T = P(Xt + Xt+T). A switching error is said to occur if the mapping function performed by the switch at any given time is not exactly that which the switch is expected to do. Thus, a switching error occurs if Pt =/ Pt+T or if Yt =/ PtXt . Let Et be the binary vector representing the output error vector at time slot t so that the output sequences are expressed as Yt = Et PtXt .

Since the last expression is also written as Yt = Pt(Xt + P-1t Et), the output error may be seen to be caused by an additive error to the input given by the vector P-1Et . The quantity P-1Et is referred to as the reflection at the output error Et . Note that W(P-1Et) =

W(Et) so that the occurrence of an output error of a given intensity is equivalent to the occurrence of an input error of the same intensity.

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An output error is said to occur if the output vector is not...