Browse Prior Art Database

Electro-Optic Package Diagnostic Chip

IP.com Disclosure Number: IPCOM000038774D
Original Publication Date: 1987-Mar-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Grischkowsky, DR: AUTHOR [+4]

Abstract

A technique for conducting very high speed electrical measurements on a high performance package is provided and comprises: providing electro- optic pulse switches and samplers on silicon-on-sapphire chips; flip- chip bonding the silicon-on-sapphire chips onto the package part to be measured, wherein transmission lines on the chips are joined to those on the package part, and pulse switching and sampler bias lines of the chips are in similar fashion connected to lines on the package part that lead to input-output pads at the package part periphery; laser pulsing the switches through the back side of the chips to provide electrical pulse or step functions having lengths on the order of picoseconds; and measuring the desired characteristics of the high performance package.

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Electro-Optic Package Diagnostic Chip

A technique for conducting very high speed electrical measurements on a high performance package is provided and comprises: providing electro- optic pulse switches and samplers on silicon-on-sapphire chips; flip- chip bonding the silicon- on-sapphire chips onto the package part to be measured, wherein transmission lines on the chips are joined to those on the package part, and pulse switching and sampler bias lines of the chips are in similar fashion connected to lines on the package part that lead to input-output pads at the package part periphery; laser pulsing the switches through the back side of the chips to provide electrical pulse or step functions having lengths on the order of picoseconds; and measuring the desired characteristics of the high performance package. Among other differences, the provided technique is in contrast to time domain reflectrometry techniques in that the electrical pulse and sampling resolutions of the provided technique are on the order of one magnitude faster. In the figure, transparent silicon-on-sapphire chips A, B, C, and D are seen bonded face down onto a high performance package part 10 which is to be tested. The silicon-on- sapphire chips are provided with transmission lines, transmission line pads, and sampling or switching (pulse generating) probes. The transmission lines are designs of two types. A first design includes two 50-micron lines separated by a 50-micron space, with the lines terminating in pads, and with probes symmetrically located near each end. A second design includes two 10-micron lines with a 10-micron space, with the lines tapering outwardly to terminate in pads and...