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Address Decoding in Restricted Address Space

IP.com Disclosure Number: IPCOM000038895D
Original Publication Date: 1987-Mar-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Oliver, LM: AUTHOR [+2]

Abstract

A battery back-up, realtime, clock-calendar chip, which requires sixty- four addresses in a personal computer, can be operated with only two addresses in the personal computer while the chip still functions as if there are sixty-four addresses. This allows the chip to reside in a restricted address space. Only two addresses in an IBM PC are used by a Motorola 146818 realtime clock chip 2, which requires sixty-four addresses and is connected to the IBM PC through a decode logic 3. These two addresses may be two of the sixteen addresses assigned to the IBM Game Adapter Card, such as addresses 0203H and 0205H, for example. The IBM Game Adapter Card uses only two of the sixteen addresses, and it does not use 0203H and 0205H, for example.

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Address Decoding in Restricted Address Space

A battery back-up, realtime, clock-calendar chip, which requires sixty- four addresses in a personal computer, can be operated with only two addresses in the personal computer while the chip still functions as if there are sixty-four addresses. This allows the chip to reside in a restricted address space. Only two addresses in an IBM PC are used by a Motorola 146818 realtime clock chip 2, which requires sixty-four addresses and is connected to the IBM PC through a decode logic 3. These two addresses may be two of the sixteen addresses assigned to the IBM Game Adapter Card, such as addresses 0203H and 0205H, for example. The IBM Game Adapter Card uses only two of the sixteen addresses, and it does not use 0203H and 0205H, for example. However, any other two of the fourteen unused addresses could be employed rather than 0203H and 0205H. When AEN (Address Enable) and IOW* (I/O Write Not) signals are up and address lines A0 - A9 are at address 0203H in the IBM PC, an AS (Address Strobe) signal from the decode logic 3 goes up. This causes the chip 2 to receive an address from the IBM PC through address-data lines AD0 - AD7. This results in the chip 2 latching the internal address that it is receiving over the address-data lines AD0 - AD7 as the address rather than the single address of 0203H; this is the address that is to be used for reading or writing. Thus, the next read or write signal to the chip 2 without an AS signal will perform the appropriate operation...