Browse Prior Art Database

Infrared Transmitter With Dual Power Levels

IP.com Disclosure Number: IPCOM000038903D
Original Publication Date: 1987-Mar-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Bustamante, CM: AUTHOR [+2]

Abstract

A technique is described whereby an electrical circuit provides the capability to transmit infrared signals at two different power levels: a high transmit power level used for timing purposes and a low transmit power level used for transmission of data. By providing two levels of infrared transmission and used in conjunction with a correlation detector receiver, the distance of transmission is significantly increased. This is particularly useful when used in local area network (LAN) systems to increase throughput of information processing. The transmitter is designed to provide two levels of transmission of infrared light, first at a high power level, approaching five times higher transmit levels of power than the lower level of power used for data transmission.

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Infrared Transmitter With Dual Power Levels

A technique is described whereby an electrical circuit provides the capability to transmit infrared signals at two different power levels: a high transmit power level used for timing purposes and a low transmit power level used for transmission of data. By providing two levels of infrared transmission and used in conjunction with a correlation detector receiver, the distance of transmission is significantly increased. This is particularly useful when used in local area network (LAN) systems to increase throughput of information processing. The transmitter is designed to provide two levels of transmission of infrared light, first at a high power level, approaching five times higher transmit levels of power than the lower level of power used for data transmission. This dual power level approach has resulted in a seventy percent increase in the distance needed to reliably receive data, as compared to prior-art systems. The transmitter topology, as shown in the figure, uses transceiver gate array 10 to implement the physical layer network protocol. Output 11 of transceiver gate array 10 controls the transmit data, while output 12 controls the power level of transmission. Driver 13 consists of analog circuitry which acts as a pre-driver and level shifter to drive data power field-effect transistor (FET) 14. Power level FET 15 acts as a shunt current path to resistor 16 and is controlled by the logic signals from output 12. R...