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Browse Prior Art Database

Ternary Semiconductor Superconducting Device

IP.com Disclosure Number: IPCOM000038906D
Original Publication Date: 1987-Mar-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Brady, MJ: AUTHOR [+5]

Abstract

The use of a ternary alloy of InGaAs for a collector isolator and the insulation of the surface thereof with a p-n junction provides the ability to provide control of the barrier height at the base interface while providing general insulation. The device is shown in Fig. 1, with an energy diagram in Fig. 2 illustrating the use of a p-type layer to provide insulation between metal and n-InGaAs, and Fig. 3 is an energy diagram illustrating the position of the conduction band with 20% In concentration at the base, which In concentration sets the conduction band position. The semiconductor would be grown in layers in an epitaxial process, as shown in Fig. 1. The substrate would be a GaAs wafer, which is known to be suitable for epitaxial growth of InGaAs. The lowest layer grown on the GaAs would be n+ InGaAs, of the order of 0.

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Ternary Semiconductor Superconducting Device

The use of a ternary alloy of InGaAs for a collector isolator and the insulation of the surface thereof with a p-n junction provides the ability to provide control of the barrier height at the base interface while providing general insulation. The device is shown in Fig. 1, with an energy diagram in Fig. 2 illustrating the use of a p-type layer to provide insulation between metal and n-InGaAs, and Fig. 3 is an energy diagram illustrating the position of the conduction band with 20% In concentration at the base, which In concentration sets the conduction band position. The semiconductor would be grown in layers in an epitaxial process, as shown in Fig.
1. The substrate would be a GaAs wafer, which is known to be suitable for epitaxial growth of InGaAs. The lowest layer grown on the GaAs would be n+ InGaAs, of the order of 0.5 micron thick. This layer is doped to be degenerate and functions as the collector electrode. The next layer would be about 0.2 micron of n InGaAs, with moderate or low doping, to help the carriers to freeze out at low temperatures. The final layer would be about 0.01 micron of p

(Image Omitted)

InGaAs, doped at about 2x1018, to make a solid p-type layer with a good Schottky barrier at the surface. It is this Schottky barrier that effectively insulates the active n InGaAs from metal deposited on the surface, as shown in Fig. 2. The concentration of In and Ga in the InGaAs is chosen to control the ba...