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Area Array Substrate-To-Carrier Interconnection Using Corner Standoff

IP.com Disclosure Number: IPCOM000038985D
Original Publication Date: 1987-Apr-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 35K

Publishing Venue

IBM

Related People

Foster, RA: AUTHOR

Abstract

A method for achieving adequate solder joint height for reliable interconnections when joining materials with different expansion rates is described. Electronic packaging methodology is migrating from "pin-in-hole" to surface-soldered components to achieve increased circuit density, wireability and performance. It is desirable to adapt leaded chip carrier technologies (i.e., multilayer ceramic (MLC) and thin-film or metallized ceramic (MC) modules) to leadless surface-mounted versions. A major technical problem in doing this is the mismatch in thermal expansion rates between the ceramic substrates and organic laminates. The approach utilizes a metal column to absorb the shear strain between substrate and organic carrier.

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Area Array Substrate-To-Carrier Interconnection Using Corner Standoff

A method for achieving adequate solder joint height for reliable interconnections when joining materials with different expansion rates is described. Electronic packaging methodology is migrating from "pin-in-hole" to surface-soldered components to achieve increased circuit density, wireability and performance. It is desirable to adapt leaded chip carrier technologies (i.e., multilayer ceramic (MLC) and thin-film or metallized ceramic (MC) modules) to leadless surface-mounted versions. A major technical problem in doing this is the mismatch in thermal expansion rates between the ceramic substrates and organic laminates. The approach utilizes a metal column to absorb the shear strain between substrate and organic carrier. The attachment method involves the use of corner standoffs on the substrate in conjunction with all eutectic solder joints. The figure illustrates the method. A square or rectangular ceramic chip carrier or substrate 1 is to be attached to an organic laminate component carrier 2. A plurality of electrical interconnections are required between the ceramic substrate and organic carrier. High reliability interconnections are achieved through the use of tall, all-eutectic solder joints 3. The solder joint height needed for reliability is achieved using standoffs 4 on the four corners of the module. Claims and Process Methods 1. Since cracking of solder joints is a major

reliability concern, the fatigue life of the

solder joints must be maximized.

Eutectic (63% Sn 37% Pb) solder has excellent

fatigue life. The fatigue life is also related to

the height of the solder column; hence an optinum

height must be attained to maximize reliability.

2. Collapse of the solder column during reflow w...