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Digital Programmable Tracking Frequency Multiplier

IP.com Disclosure Number: IPCOM000039114D
Original Publication Date: 1987-Apr-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 64K

Publishing Venue

IBM

Related People

Balliet, L: AUTHOR [+2]

Abstract

This article describes a technique for a frequency multiplier which uses an algorithm to synthesize a higher frequency signal from a lower frequency signal. Tracking frequency multipliers are needed in many controls applications, such as robotics and electronic engine controls in automotive applications. The traditional frequency multiplier utilizes special hardware consisting of a phase-locked loop circuit with a divider counter in the feedback loop. This method is limited especially when high multiplication factors, such as 360 times, are required. In addition, it requires additional special hardware, thus increasing cost and reducing the reliability of controls systems. A digital technique is disclosed herein for generating a programmable frequency multiplier utilizing a single-chip microcomputer.

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Digital Programmable Tracking Frequency Multiplier

This article describes a technique for a frequency multiplier which uses an algorithm to synthesize a higher frequency signal from a lower frequency signal. Tracking frequency multipliers are needed in many controls applications, such as robotics and electronic engine controls in automotive applications. The traditional frequency multiplier utilizes special hardware consisting of a phase- locked loop circuit with a divider counter in the feedback loop. This method is limited especially when high multiplication factors, such as 360 times, are required. In addition, it requires additional special hardware, thus increasing cost and reducing the reliability of controls systems. A digital technique is disclosed herein for generating a programmable frequency multiplier utilizing a single-chip microcomputer. Single-chip microcomputers, such as Intel's 8051 or Motorola's 6801, are widely used as control

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lers. The microcomputer can perform the control task while utilizing internal hardware to generate the multiple frequency signal. The requirement is to design a frequency multiplier that generates an output signal "Fo' which is always a certain multiple 'm' of an input signal "Fi' regardless of the frequency changes of 'Fi'. Input signal 'Fi' of frequency fi and period Ti=1/fi is a variable frequency signal such as that generated by a magnetic pickup positioned in the proximity of the crank shaft of an automobile producing RPM information and position relative to top dead center (TDC) of one of the cylinders. The frequency of such a signal varies between 600 RPM (10 Hz) at idle and 6000 RPM (100 Hz). The requirement is to generate an output signal "fo" such that fo = (m) (fi) throughout the range of 'Fi'. This digitally generated multiple frequency signal can be used in controls applications such as spark timing control, thus eliminating the need for a magnetic transducer and a multi-tooth gear on the crank shaft to generate the same output. The idea is to enable a counter to count the pulses of a high frequency clock (fc) during each period Ti of the input. The clock frequency is chosen such that fc=(n) (fi) with n>>m. Thus, at the end of each period of the input signal the counter holds a count value k, indicating the number of clock pulses of fc during Ti. This count is then divided by m and the resulting value k/m is loaded into...