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MOS Gate Stack Rie Process With Self-Passivating Sidewalls

IP.com Disclosure Number: IPCOM000039239D
Original Publication Date: 1987-May-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Bright, AA: AUTHOR [+5]

Abstract

The gate stack in current MOS devices is defined by first etching through the stack, then overcoating with conformal Si3N4, and then etching off the Si3N4 (Fig. 1). This leaves Si3N4 covering the edges of the stack to passivate them. This publication describes a new method (Fig. 2) of forming a stack with passivated sidewalls which simplifies the process, improves process control tolerances, and reduces etch-induced damage. The key feature of the process is the use of a halosilicon gas in place of the more usual halocarbon gas, in combination with O2 . In a typical example, a CF4 + O2 process, the O2 leads to increased F production by reacting with the carbon to form CO2, which is pumped away.

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MOS Gate Stack Rie Process With Self-Passivating Sidewalls

The gate stack in current MOS devices is defined by first etching through the stack, then overcoating with conformal Si3N4, and then etching off the Si3N4 (Fig. 1). This leaves Si3N4 covering the edges of the stack to passivate them. This publication describes a new method (Fig. 2) of forming a stack with passivated sidewalls which simplifies the process, improves process control tolerances, and reduces etch-induced damage. The key feature of the process is the use of a halosilicon gas in place of the more usual halocarbon gas, in combination with O2 . In a typical example, a CF4 + O2 process, the O2 leads to increased F production by reacting with the carbon to form CO2, which is pumped away. In the new process, using SiF4 + O2, the same increase in F is observed, but the reaction product of O2 and Si is SiOx which deposits on the surfaces of the wafer. On the horizontal surfaces a competition then exists between oxide growth and ion bombardment-induced etching. The balance depends on the O2 concentration and the incident RF power. On the sidewalls, however, there is little or no ionic bombardment and the oxide growth process predominates. Experiments demonstrating this effect have been performed on WSix/ W/WSix stacks. Using CF4 + O2, severe undercuts appear in the WSix layers. When SiF4 + O2 is used, vertical sidewalls are produced with no undercut. Further evidence is found in the dependence of etch r...