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Metallized Ceramic Cermet Substrate Topseal Process

IP.com Disclosure Number: IPCOM000039245D
Original Publication Date: 1987-May-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Elmgren, JA: AUTHOR [+2]

Abstract

A method of protecting thin film cermet (Cr3Si/SiO2) resistors from contamination and moisture encountered during processing is accomplished by the application of a blanket layer of silicon dioxide over an entire substrate at a point during the manufacturing process shortly after the cermet material is exposed to the environment. The method is described below. The cermet-covered substrate is sputtered with successive layers of chromium (Cr), copper (Cu), and chromium (Cr). Photoresist is applied, exposed, and developed to enable the Cr/Cu/Cr and cermet layers to be etched to personalize circuit lines. The resist is then stripped. Another layer of photoresist is applied, exposed, and developed. The Cr/Cu/Cr layers are etched. The resist is then stripped, and the substrate is cleaned.

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Metallized Ceramic Cermet Substrate Topseal Process

A method of protecting thin film cermet (Cr3Si/SiO2) resistors from contamination and moisture encountered during processing is accomplished by the application of a blanket layer of silicon dioxide over an entire substrate at a point during the manufacturing process shortly after the cermet material is exposed to the environment. The method is described below. The cermet- covered substrate is sputtered with successive layers of chromium (Cr), copper (Cu), and chromium (Cr). Photoresist is applied, exposed, and developed to enable the Cr/Cu/Cr and cermet layers to be etched to personalize circuit lines. The resist is then stripped. Another layer of photoresist is applied, exposed, and developed. The Cr/Cu/Cr layers are etched. The resist is then stripped, and the substrate is cleaned. A layer of silicon dioxide is then sputtered on the entire substrate to a thickness of approximately 500 angstroms. A photoresist is applied, exposed, and developed. Areas of the substrate which are to be soldered are etched using a modified plasma etch process to remove the silicon dioxide and top chrome layer in those areas. The resist is then stripped. The resistor is annealed, and the substrate is pinned and tinned. The resistor is then trimmed to a specific value.

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