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Random Pattern Generator Using Ring Oscillators

IP.com Disclosure Number: IPCOM000039350D
Original Publication Date: 1987-May-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Lips, JP: AUTHOR [+2]

Abstract

This circuit generates digital random patterns and consists of two ring oscillators powered by noisy power supplies. Each power supply is disturbed by the functioning of the ring oscillators. The figure shows two ring oscillators powered by noisy power supplies providing X, Y, Z and T signals and the method of combining those signals in order to deliver a random bit. All the transistors used in the circuit belong to the internal part of a CMOS gate array, i.e., all NMOS transistors N1 to N9, N11 to N15, N21, N22, N23 and N24 have a unique size, and all PMOS transistors P1 to P9, P11 to P15, P21, P22, P23, P24 have a unique size. The first ring oscillator has 9 inverters, each inverter being composed of one NMOS transistor (N1 for the first inverter) and PMOS transistor (P1 for the first inverter).

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Random Pattern Generator Using Ring Oscillators

This circuit generates digital random patterns and consists of two ring oscillators powered by noisy power supplies. Each power supply is disturbed by the functioning of the ring oscillators. The figure shows two ring oscillators powered by noisy power supplies providing X, Y, Z and T signals and the method of combining those signals in order to deliver a random bit. All the transistors used in the circuit belong to the internal part of a CMOS gate array, i.e., all NMOS transistors N1 to N9, N11 to N15, N21, N22, N23 and N24 have a unique size, and all PMOS transistors P1 to P9, P11 to P15, P21, P22, P23, P24 have a unique size. The first ring oscillator has 9 inverters, each inverter being composed of one NMOS transistor (N1 for the first inverter) and PMOS transistor (P1 for the first inverter). The output of the eighth inverter is designated X, and the output of the ninth inverter is designated Y. The second ring oscillator has 5 inverters. The output of the fourth inverter is designated Z, and the output of the fifth inverter is designated T. The ring oscillators are built so that all inverters use the same transistor type and the same physical design and parasitic capacitance. The two ring oscillators are powered by noisy power supplies, labelled GDl, GD2 for negative power supplies and VH1, VH2 for positive power supplies. Inverters with an odd number are powered between VH1 and GD1. Inverters with an even number are powered between VH2 and GD2. The GD1 noisy power supply is provided by a voltage drop through N21, N22 series transistors, above the GD power supply. The current flows from GD1 to GD when odd inverters of the first ring oscillator or the even inverters of the second ring oscillator have a falling transition. Transistors N21, N22 are kept on by connect...