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Hardware Scheme for Introducing Startup Values Into an Array Memory Device

IP.com Disclosure Number: IPCOM000039400D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Bishop, JW: AUTHOR [+2]

Abstract

A scheme to greatly reduce array initialization time during both initial machine load and test time is made possible due to the elimination of microcode scanning routines. The scheme reduces the possibility of errors because of the diminished interaction that is needed between the service processor microcoder and the hardware design. (Image Omitted) Array initialization at initial machine load time is typically accomplished by using the A and B clocks to load the initialization data into the array's shift register latch (SRL) data register and then activating the maintenance write strobe for each array location. This involves scanning in the data and address into their respective registers and performing a write.

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Hardware Scheme for Introducing Startup Values Into an Array Memory Device

A scheme to greatly reduce array initialization time during both initial machine load and test time is made possible due to the elimination of microcode scanning routines. The scheme reduces the possibility of errors because of the diminished interaction that is needed between the service processor microcoder and the hardware design.

(Image Omitted)

Array initialization at initial machine load time is typically accomplished by using the A and B clocks to load the initialization data into the array's shift register latch (SRL) data register and then activating the maintenance write strobe for each array location. This involves scanning in the data and address into their respective registers and performing a write. This step is repeated for every location of the array even though most arrays are initialized to all zeros with good parity. The described scheme will need only one scan to initialize an entire array and will initialize all arrays simultaneously. A counter will address all locations of the array while the data register remains constant. Since the data register must remain constant, arrays which are initialized with irregular patterns will still need to be initialized by scanning in each word of the array.

(Image Omitted)

The steps to initialize the array are:

1) Scan into the data register the data that will be

loaded into every location of the array.

2) Scan into the counter the starting value of all

zeros.

3) Scan a one into the initialize mode scan-only

latch.

4) Scan a one into the initialize array scan-only

latch if the array it is associated with is to be

initialized. Otherwise, scan a zero into this

scan-only latch. This will leave the contents of

that array alone.

5) Scan in the proper values to disable machine

checks from occurring while the system clocks are

running.

6) Start system clocks. The desired arrays will be

initialized simultaneously. Stop the system

clocks after enough time has elapsed for the

largest array to be initialized. Note that for

the smaller arrays the counter may wrap around,

which only reinitializes the arrays. Two different

1

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scan-only latches are used to gate the array write signal. An initialize array scan-only latch is assigned to each array deciding at initial microcode load (IML) time whether...