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Vectored I/O Memory-To-Memory Transfers for the IBM Personal Computer

IP.com Disclosure Number: IPCOM000039431D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 1 page(s) / 13K

Publishing Venue

IBM

Related People

Corkell, AF: AUTHOR [+3]

Abstract

A technique is described whereby memory-to-memory direct memory access (DMA) transfers on the IBM Personal Computer (PC) bus take place utilizing vectored input/output (I/O) during read and write operations. The technique is unique in that the vectored I/O approach eliminates the need of having all memory-to-memory accesses on the bus via the central processing unit (CPU). In prior art, a PC DMA without this technique could not support memory-to-memory operations. The technique described herein performs a DMA memory-to-memory transfer by utilizing an adapter circuit card along with a vector I/O circuit in connection to the main storage of the PC. In prior art, when memory-to-memory DMA operations were not supported, all memory-to-memory transfers occurred under control of the CPU.

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Vectored I/O Memory-To-Memory Transfers for the IBM Personal Computer

A technique is described whereby memory-to-memory direct memory access (DMA) transfers on the IBM Personal Computer (PC) bus take place utilizing vectored input/output (I/O) during read and write operations. The technique is unique in that the vectored I/O approach eliminates the need of having all memory-to-memory accesses on the bus via the central processing unit (CPU). In prior art, a PC DMA without this technique could not support memory-to- memory operations. The technique described herein performs a DMA memory- to-memory transfer by utilizing an adapter circuit card along with a vector I/O circuit in connection to the main storage of the PC. In prior art, when memory-to- memory DMA operations were not supported, all memory-to-memory transfers occurred under control of the CPU. This created a bottleneck and performance problems in CPUs which do not support memory-to-memory string operations. Vectored I/O essentially enables the adapter circuit card's memory to function as an I/O device to the DMA channel, thereby allowing memory-to-memory transfers to take place, normally at twice the speed of CPU memory-to-memory transfers. To implement vectored I/O, two control registers are used to inform the adapter circuit card that a particular DMA channel is being used for vectored I/O, read and write, respectively. The registers are as wide as the number of DMA channels. In this case, the registers are seven bits wide. Writing a one to any bit to the write control register designates a particular DMA channel as a vectored I/O device for writing. Since a channel cannot be both read and written at the same time, a fail-safe circuit has been added. The fai...