Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Integrated Extraction Electrodes for Ion Sources

IP.com Disclosure Number: IPCOM000039491D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Briska, M: AUTHOR [+4]

Abstract

A dual grid extraction electrode is proposed for an ion source, wherein both grids are integrated on an Si wafer and insulated from each other by a thin SiO2 layer. The risk of sputter contamination of the insulator is eliminated by structuring the SiO2 layer using highly energetic heavy ions. The dual grid extraction electrode consists of a silicon wafer 1, a polysilicon layer 3 and an intermediate silicon dioxide layer 2. A pattern of grid holes 6 is etched through the three layers (Fig. 4). The walls of the SiO2 layer in holes 6 are irradiated with highly energetic heavy ions to alter their surfaces such that even metal vapor deposition does not degrade the electrical insulation effect. The process for forming the dual grid extraction electrode comprises the following steps.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 74% of the total text.

Page 1 of 2

Integrated Extraction Electrodes for Ion Sources

A dual grid extraction electrode is proposed for an ion source, wherein both grids are integrated on an Si wafer and insulated from each other by a thin SiO2 layer. The risk of sputter contamination of the insulator is eliminated by structuring the SiO2 layer using highly energetic heavy ions. The dual grid extraction electrode consists of a silicon wafer 1, a polysilicon layer 3 and an intermediate silicon dioxide layer 2. A pattern of grid holes 6 is etched through the three layers (Fig. 4). The walls of the SiO2 layer in holes 6 are irradiated with highly energetic heavy ions to alter their surfaces such that even metal vapor deposition does not degrade the electrical insulation effect. The process for forming the dual grid extraction electrode comprises the following steps. 1) A doped Si wafer 1 (R < 2000 Lcm) of a diameter of about

200 mm is oxidized (oxide thickness 1 - 3 Èm)

(Fig. 1).

2) On dioxide layer 2, a 1 - 3 Èm thick polysilicon

layer 3 is deposited (Fig. 2).

3) A resist mask 4, defining the grid holes, is

applied to the back of the wafer and a blanket

resist layer 5 to its front.

4) From the back of the wafer, grid holes 6 (about

400 Èm deep) are etched into wafer 1 with KOH

(Fig. 3).

5) In a dry etch process (RIE) in CF4+H2, holes 6 are

extended through SiO2 layer 2 and polysilicon

layer 3. The surface of SiO2 layer 2 is structured by heavy, say, Xe24+, ion bombardment and etching (Fig. 4). The desc...