Browse Prior Art Database

Advanced I/O Adapter Design

IP.com Disclosure Number: IPCOM000039533D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Adams, PM: AUTHOR

Abstract

I/O adapters presently disclosed allow for more efficient usage of multi-accessible system buses of the type contained in contemporary IBM Personal Computer systems. Referring to the illustration, system bus 1 couples CPU 2 and memory 3 with I/O adapters 4. Each adapter links one or more respective devices 5 to the bus, and contains logic 6 for selectively compressing and decompressing data signals in transit between the bus and respective devices. The effect is to reduce the volume of data traffic on the bus relative to what it would have been without compression. Upon initiation of system access to a device (or communication attachment), the respective adapter is conditioned to operate in one of three modes: compress mode, decompress mode, or clear mode. In compress mode, the adapter operates to compress data, e.g.

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Advanced I/O Adapter Design

I/O adapters presently disclosed allow for more efficient usage of multi- accessible system buses of the type contained in contemporary IBM Personal Computer systems. Referring to the illustration, system bus 1 couples CPU 2 and memory 3 with I/O adapters 4. Each adapter links one or more respective devices 5 to the bus, and contains logic 6 for selectively compressing and decompressing data signals in transit between the bus and respective devices. The effect is to reduce the volume of data traffic on the bus relative to what it would have been without compression. Upon initiation of system access to a device (or communication attachment), the respective adapter is conditioned to operate in one of three modes: compress mode, decompress mode, or clear mode. In compress mode, the adapter operates to compress data, e.g., data in transit from a device to system memory 3 via bus 1. In decompress mode, the adapter operates to decompress data, e.g., data in transit via the bus from memory 3 to a device. In clear mode, the adapter operates to pass data in clear form, i.e., unmodified, between the bus and a respective device. Preferably, the logic for compression and decompression is tailored to the type of device controlled by the adapter. Thus, a graphics adapter would have logic specialized for compressing and decompressing picture type information; an adapter for handling digitized speech would have logic for compressing speech, and so for...