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Method for Functional Testing of High Speed VLSI Devices and Cache Systems

IP.com Disclosure Number: IPCOM000039537D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Chiu, GL: AUTHOR [+2]

Abstract

This article describes solutions to two major technical problems present in high-speed VLSI functional testing. The space transformer presents the first major problem for high speed functional testing. The space transformer consists of the electrical connection between the test pin head at one end and buckling beam probe tip that contacts the chip under test at the other end. The cobra connector has a self-inductance of about 700 picohenries and pairwise mutual inductance of about 200 picohenries (with signal-to- ground ratio of 6 to 1). This inductive discontinuity limits the test speed to 250 MHz or below. As pointed out above, to monitor the VLSI chip outputs without an electrical space transformer is the key to building gigahertz testers.

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Method for Functional Testing of High Speed VLSI Devices and Cache Systems

This article describes solutions to two major technical problems present in high- speed VLSI functional testing. The space transformer presents the first major problem for high speed functional testing. The space transformer consists of the electrical connection between the test pin head at one end and buckling beam probe tip that contacts the chip under test at the other end. The cobra connector has a self-inductance of about 700 picohenries and pairwise mutual inductance of about 200 picohenries (with signal-to- ground ratio of 6 to 1). This inductive discontinuity limits the test speed to 250 MHz or below. As pointed out above, to monitor the VLSI chip outputs without an electrical space transformer is the key to building gigahertz testers. The essential element in avoiding the electrical problems due to self- inductance and mutual inductance in the wiring connection between the tester termination and the VLSI chip "footprint" is the ability to propagate the multiple optical signals in a fiber-optic "bundle" between the test signal source and the chip. This eliminates the inductive cross-talk noise as well as the self-inductance and capacitive level effects. The input signals can be fed via optical fibers. Two embodiments to detect outputs of a silicon chip using electrooptic effect will be described. The first technique is to attach a chip to an electro-optic substrate. Metal pads are evaporated on the electro-optic crystal. Electrical connections (using, for instance, wire-bond) are made between the primary outputs to the pads on the...