Browse Prior Art Database

Product Overlay Control and Analysis Package for Wafer Manufacturing

IP.com Disclosure Number: IPCOM000039645D
Original Publication Date: 1987-Jul-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 57K

Publishing Venue

IBM

Related People

Polimeni, JC: AUTHOR [+2]

Abstract

Overlay is the displacement of the pattern of one semiconductor level with respect to another and is generally measured by reading verniers. Vernier scales are used on wafers during photolithographic operations to obtain precise alignment of patterns with respect to one another and to the wafer. Overlay data consisting of vernier values is recorded, tracked and analyzed for each level of the photolithographic process to assure conformance to overlay engineering specifications. This is an overlay data collection, control and analysis system using mostly software (BASIC language) for use with an IBM Personal Computer (PC) or compatible equipment. This package includes several features, as follows: (1) Data entry locations are moved easily since PCs are not connected to a host computer or other PCs.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Product Overlay Control and Analysis Package for Wafer Manufacturing

Overlay is the displacement of the pattern of one semiconductor level with respect to another and is generally measured by reading verniers. Vernier scales are used on wafers during photolithographic operations to obtain precise alignment of patterns with respect to one another and to the wafer. Overlay data consisting of vernier values is recorded, tracked and analyzed for each level of the photolithographic process to assure conformance to overlay engineering specifications. This is an overlay data collection, control and analysis system using mostly software (BASIC language) for use with an IBM Personal Computer (PC) or compatible equipment. This package includes several features, as follows: (1) Data entry locations are moved easily since PCs are not

connected to a host computer or other PCs.

(Image Omitted)

(2) It analyzes voluminous data on a PC instead of a mainframe

by using statistical sums rather than raw data. (3) It has built-in routines to find the cause of a problem. (4) It employs graphics routines without a graphics adapter card. (5) Data can be transferred to LOTUS 1-2-3 and other popular commercially available software packages. Lot samples of wafers are subjected to 5 or more vernier measurements at each processing level followed by a statistical analysis of the collected data to determine and eliminate overlay. This software performs the analysis and identifies the cause of overlay. There are two groups of subroutines, those residing in the remote PCs where data is entered (Group I) (analyzed on a lot basis), and those residing in the main PC (Group II) where combined data from remote PCs is analyzed daily, weekly, or monthly. In Fig. 1, the Group I subroutines are CALCOV, STOREOV and DISPOV. CALCOV (calculations) takes data from raw overlay vernier measurements and determines mask, tool, and alignment contributions. Statistical sums are calculated for each parameter of interest, avoiding recalculation. While using storage space, this PC method analyzes much data quickly, eliminating use of a mainframe for third analysis. STOREOV (store data) stores raw data, which details the lot (tool used, mask used, date, etc.) and statistical sums.

DISPOV (disposition lot) tests for each l...