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Circuit for Adjustable Delta-V Parameter

IP.com Disclosure Number: IPCOM000039694D
Original Publication Date: 1987-Jul-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Kerwin, GJ: AUTHOR [+2]

Abstract

The Adjustable Data Detection Parameter defined herein is used in the digitization of the analog read signal of a magnet storage device. This parameter, which acts as a screen or filter of spurious non-data pulses, is called the Delta-V requirement or detection parameter. Its optimal value changes as the transfer function of the recording channel changes. Its adjustability, then, results in the ability to increase the read performance of the channel. The figure shows a detailed block diagram of the circuit that implements the Adjustable Delta-V Parameter. Notice that the Delta-V Detector circuit is depicted as a black box that senses the voltage VDEL across the resistor RDEL. A 2-volt, 2.5% reference voltage is used to set up the Delta-V voltage.

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Circuit for Adjustable Delta-V Parameter

The Adjustable Data Detection Parameter defined herein is used in the digitization of the analog read signal of a magnet storage device. This parameter, which acts as a screen or filter of spurious non-data pulses, is called the Delta-V requirement or detection parameter. Its optimal value changes as the transfer function of the recording channel changes. Its adjustability, then, results in the ability to increase the read performance of the channel. The figure shows a detailed block diagram of the circuit that implements the Adjustable Delta-V Parameter. Notice that the Delta-V Detector circuit is depicted as a black box that senses the voltage VDEL across the resistor RDEL. A 2-volt, 2.5% reference voltage is used to set up the Delta-V voltage. The Delta-V voltage is broken up into two components, a base value and an increment value. The base Delta-V voltage represents the minimum desired value of Delta-V. The increment Delta-V voltage represents an adder to the base Delta-V voltage which can be dynamically altered via a 3-bit digital control bus. The upper left-hand side of the figure shows a voltage VBASE being generated by using resistors R11 and R12 to divide down the on-chip 2-volt reference. The voltage is brought to a module pin so that it can be monitored or modified. Amplifier AMP-3 buffers this base voltage and feeds it to a transconductance amplifier made up of amplifier AMP-4; transistors Q5, Q6 and resistors R14, R15. The resulting current is dropped across resistor RDEL in the Delta-V detector to produce the base Delta-V voltage. The numbers near the collector terminals of transistors Q5 and Q6 depict relative emitter areas of the devices. The numbers are both one, and the device emitter resistors are identical so transistor Q5 and Q6 carry identical collector currents. Since the ratio of resistor R14 to resistor RDEL is four to one, the voltage generated across RDEL is one-fourth of the voltage applied by the resistor divider of resistors R11, R12. The offset error of this circuit is null...