Browse Prior Art Database

Color/Graphics Adapter Register Compatibility

IP.com Disclosure Number: IPCOM000039781D
Original Publication Date: 1987-Aug-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 71K

Publishing Venue

IBM

Related People

Parsons, DH: AUTHOR [+2]

Abstract

A technique is described whereby color/graphics adapter circuitry, as used in personal computers, is enhanced so as to provide software compatibility between various types of enhanced graphic adapters. Higher quality text and graphics images are provided through doubling the horizontal sweep rate, while maintaining compatibility at the register level of the existing software application base. (Image Omitted) In prior art, programming of video graphics applications, at early color graphics adapter (CGA) levels, was often accomplished by using direct access to hardware registers for operations, such as screen centering and mode setting, instead of using the BIOS software interface. When enhanced graphics adapters (EGA) were introduced, the programming was often not compatible.

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Color/Graphics Adapter Register Compatibility

A technique is described whereby color/graphics adapter circuitry, as used in personal computers, is enhanced so as to provide software compatibility between various types of enhanced graphic adapters. Higher quality text and graphics images are provided through doubling the horizontal sweep rate, while maintaining compatibility at the register level of the existing software application base.

(Image Omitted)

In prior art, programming of video graphics applications, at early color graphics adapter (CGA) levels, was often accomplished by using direct access to hardware registers for operations, such as screen centering and mode setting, instead of using the BIOS software interface. When enhanced graphics adapters (EGA) were introduced, the programming was often not compatible. The concept described herein not only insures software compatibility with existing applications at all levels, but provides higher quality text and graphics for the video subsystems. Also, the circuit eliminates the need for separate software drivers, such as those used in speadsheets and flight simulating programs. The typical circuit concept to control the horizontal sweep of the CGA is as shown in Fig. 1. Horizontal counter 10 is clocked every character time and the value of the counter is compared against registers 11 at comparators 12, to determine the timing values required by the horizontal display and synchronization circuitry. To provide the required compatibility with the various graphics adapters, additional circuitry is added between registers 11 and comparators 12, as shown in Fig. 2. To control the recalculation of all CGA compatible modes, the registers have been duplicated. For emulation of CGA modes, Bit 0 of the CGA mode register (PORT 3d8) selects 80-column alphanum...