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Shadow General-Purpose Registers

IP.com Disclosure Number: IPCOM000039947D
Original Publication Date: 1987-Aug-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Buonomo, J: AUTHOR [+8]

Abstract

A microprocessor containing the architected general-purpose registers (GPRs) of an IBM System/370 cannot obtain work registers for emulation of 370 instructions and other functions. A method for a microprocessor to utilize shadow GPRs as work registers is described below. The shadow GPR method provides a means of using the GPRs as a bank of on-chip work registers, with the only drawback being the need to restore the GPRs. The restore is done quickly because it does not involve storage cycles. The shadow GPRs are located adjacent to and are electrically coupled (cell by cell) to the actual GPRs. The actual GPRs are the registers which are coupled to the internal buses of the microprocessor; the shadow GPRs are not. In 370 mode (default mode), the GPRs are coupled to drive the shadow GPRs as the GPRs are written.

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Shadow General-Purpose Registers

A microprocessor containing the architected general-purpose registers (GPRs) of an IBM System/370 cannot obtain work registers for emulation of 370 instructions and other functions. A method for a microprocessor to utilize shadow GPRs as work registers is described below. The shadow GPR method provides a means of using the GPRs as a bank of on-chip work registers, with the only drawback being the need to restore the GPRs. The restore is done quickly because it does not involve storage cycles. The shadow GPRs are located adjacent to and are electrically coupled (cell by cell) to the actual GPRs. The actual GPRs are the registers which are coupled to the internal buses of the microprocessor; the shadow GPRs are not. In 370 mode (default mode), the GPRs are coupled to drive the shadow GPRs as the GPRs are written. Thus, the GPRs and the shadow GPRs are exact copies of each other in the 370 mode. When the microprocessor wants to use the GPRs as work registers, during emulation, the shadow GPRs are de-coupled from the GPRs, thereby automatically saving the GPR values in the shadow GPRs. All sixteen GPRs are now available for use as work registers with full access to the internal buses as always. When the microprocessor is finished using the GPRs as work registers, the shadow GPRs are coupled to drive the GPRs when the GPRs are loaded to themselves. A series of "LR RO, RO", etc., sequences is then issued until all GPRs that were used as...