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Monotonic Digital-To-Analog Converter Without Precisely Matched Resistors

IP.com Disclosure Number: IPCOM000040028D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Frushour, JE: AUTHOR [+2]

Abstract

Standard digital-to-analog converter (DAC) configurations often have large positive or negative steps when a number of bits are turned off and the next most significant bit is turned on. A described circuit avoids this problem by not turning off the lower-order bits, and utilizing a second DAC. The circuit was used to solve a problem in which a DAC with a 600 mv range was required to be monotonic and have a resolution of 1.2 mv. The problem however was that resistor and transistor matching tolerances available on the integrated circuit chip were not adequate for the desired range. This problem occurred on the circuit when DAC bits 0-7 were switched off and bit 8 was switched on (bit 8 = most significant bit). This step caused either a large positive or large negative step to occur.

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Monotonic Digital-To-Analog Converter Without Precisely Matched Resistors

Standard digital-to-analog converter (DAC) configurations often have large positive or negative steps when a number of bits are turned off and the next most significant bit is turned on. A described circuit avoids this problem by not turning off the lower-order bits, and utilizing a second DAC. The circuit was used to solve a problem in which a DAC with a 600 mv range was required to be monotonic and have a resolution of 1.2 mv. The problem however was that resistor and transistor matching tolerances available on the integrated circuit chip were not adequate for the desired range. This problem occurred on the circuit when DAC bits 0-7 were switched off and bit 8 was switched on (bit 8 = most significant bit). This step caused either a large positive or large negative step to occur. In general, most DACs will be monotonic with good resolution for a limited number of bits. In this case the first 8 bits were good. The schematic shows the circuit details. In this arrangement, there are two monotonic 8-bit DACs (DAC 1 and DAC 2) and a 1-bit DAC (DAC 3). The circuit operation is as follows: When bit 8 is turned off, the circuit looks like an 8-bit DAC. In this case, DAC 1 steps through the first 255 counts while DACs 2 and 3 are turned off (due to the "AND with bit 8"). When bit 8 is turned on and bits 0-7 are turned off, DAC 1 remains at the count of 255 due to the "ORing" of bit 8 with bits 0-7...