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The STD Bus/Ibm PC Cluster

IP.com Disclosure Number: IPCOM000040052D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Floyd, RE: AUTHOR [+4]

Abstract

This article describes the utilization of two circuit cards that reside on the industry standard STD bus in order to create a communication port for the STD bus that matches the transmission network criteria of the IBM Personal Computer (PC) cluster. Both cards plug into the STD bus card rack and are connected to each other by means of a short ribbon cable. One card is referred to as the STD cluster interface card, and the other is the STD cluster control card. The purpose of the two cards is to provide the bus with a serial communication port that can be connected to the IBM PC cluster network and looks like an IBM PC to the rest of the network.

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The STD Bus/Ibm PC Cluster

This article describes the utilization of two circuit cards that reside on the industry standard STD bus in order to create a communication port for the STD bus that matches the transmission network criteria of the IBM Personal Computer (PC) cluster. Both cards plug into the STD bus card rack and are connected to each other by means of a short ribbon cable. One card is referred to as the STD cluster interface card, and the other is the STD cluster control card. The purpose of the two cards is to provide the bus with a serial communication port that can be connected to the IBM PC cluster network and looks like an IBM PC to the rest of the network. The STD bus is an industry standard with a large number of inexpensive cards readily available, but to date there has not been a means of interfacing with higher-level systems without the added burden of communications software being added to the engine on the STD bus. The concept described herein enables the connection of up to 64 IBM PCs and STD bus control units in any combination without placing any low-level communications software requirements on the bus masters in either system. The drawing shows the concept of this disclosure in block diagram. The STD cluster control card contains a microcontroller that handles the data transmission protocol, RAM (random-access memory) and ROM (read-only memory) for the microcontroller, a polynomial generator checker cyclic redundancy check (CRC) chip, and a programmable peripheral interface (PPI) that is used to interface between the STD bus data lines and the microcontroller. The split between the two cards is made at a point such as to keep the number of lines between the two c...