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Advanced Memory Card Package

IP.com Disclosure Number: IPCOM000040065D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 62K

Publishing Venue

IBM

Related People

Hubacher, EM: AUTHOR

Abstract

A method for creating an inexpensive way of packaging memory cards is described. The method involves packaging of memory devices on tape and then attaching the tape to a simple and inexpensive ceramic card to create an edge-connected-type memory. The first step in the method is to attach memory devices via a Tape Automated Bonding (TAB) process. Key to the step is the design of the tape which is made similar to conventional TAB; however, the tape used here contains lands (interconnection lines) that result in partial interconnection of the memory chip (Fig. 1). As an example, lands can be provided on the tape to interconnect the address lines from one chip to the next. In the same manner, the address lines of many chips can be connected together.

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Advanced Memory Card Package

A method for creating an inexpensive way of packaging memory cards is described. The method involves packaging of memory devices on tape and then attaching the tape to a simple and inexpensive ceramic card to create an edge-connected-type memory. The first step in the method is to attach memory devices via a Tape Automated Bonding (TAB) process. Key to the step is the design of the tape which is made similar to conventional TAB; however, the tape used here contains lands (interconnection lines) that result in partial interconnection of the memory chip (Fig. 1). As an example, lands can be provided on the tape to interconnect the address lines from one chip to the next. In the same manner, the address lines of many chips can be connected together. Using conventional joining techniques, the entire tape is populated with chips, as seen in Fig. 1. Special pads are provided on the d tape to permit testing and joining to the next level.

(Image Omitted)

For memory devices which normally contain relatively few I/O's, wire bonds can be used to connect the chip I/O to special pads on the tape. Once joined to the tape, each device is tested. This is accomplished by using a set of probes that surround the chip and make contact to the test pads. By utilizing a chip select line or the power inputs to the chip, each chip is tested individually without an adjacent one interfering. To avoid the problem of a short on the tape or another chip causing a short, the tape is designed with breaks every so often. This isolates the short to just a few devices. Note however, that the shorted section may be repaired and used by the techniques described below. After the tape with the memory devices is tested, the bad devices are cut out of the tape as shown in Fig. 2. The cut is made at the joining pad area in such a manner that the good chip still utilizes the joining pad. This joining pad is also used to splice the tape back together when assembly to the second level card takes place. After the bad devices are cut out, the tape is excised on the edges to eliminate the sprocket holes and excess material.

The tape is also cut into sections or units, with each section containing the number of chips required to form a row (or column) on the card. Sh...