Browse Prior Art Database

Memory Map Change

IP.com Disclosure Number: IPCOM000040106D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Aoki, T: AUTHOR [+3]

Abstract

This article describes a technique for changing a memory map when a machine, such as a display station, accepts a cartridge containing a memory. Fig. 1(A) roughly shows an original memory map for a machine which includes a basic read-only storage (ROS) storing a microcode, for example. Addresses X'00000' ... X'0FFFF' are assigned to the basic ROS. When a cartridge containing another ROS is inserted into the machine, the memory map is changed, as shown in Fig. 1(B). That is, the addresses for the basic ROS are changed to X'20000' ... X'2FFFF'. Thus, both the basic ROS and the cartridge ROS are usable. Fig. 2 shows a part of a chip select logic to cope with the above- mentioned memory map change. If the cartridge is not inserted, "-FLAG" signal is high, thereby enabling a NOR gate 2.

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Memory Map Change

This article describes a technique for changing a memory map when a machine, such as a display station, accepts a cartridge containing a memory. Fig. 1(A) roughly shows an original memory map for a machine which includes a basic read-only storage (ROS) storing a microcode, for example. Addresses X'00000'
... X'0FFFF' are assigned to the basic ROS. When a cartridge containing another ROS is inserted into the machine, the memory map is changed, as shown in Fig. 1(B). That is, the addresses for the basic ROS are changed to X'20000' ... X'2FFFF'. Thus, both the basic ROS and the cartridge ROS are usable. Fig. 2 shows a part of a chip select logic to cope with the above- mentioned memory map change. If the cartridge is not inserted, "-FLAG" signal is high, thereby enabling a NOR gate 2. For the address range from X'00000' to X'0FFFF', the height two address bits A17 and A16 are both zero, and thus the NOR gate 2 produces an output causing a NOR gate 4 to produce "-CS.ROS" output to select the basic ROS. If the cartridge is inserted, "-FLAG" signal becomes low to enable a NOR gate 3 and a NAND gate 5. Any address in the range from X'00000' to X'0FFFF' causes the NAND gate 5 to produce "-CS.CARTRIDGE" output to select the cartridge ROS. As to an address in the range from X'20000' to X'2FFFF', the address bit A17 is one and the address bit A16 is zero, whereby the NOR gate 3 produces an output causing the NOR gate 4 to produce the "- CS.ROS" output to s...