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Mc/Cermet "Selective Pad" Resistor Process

IP.com Disclosure Number: IPCOM000040123D
Original Publication Date: 1987-Sep-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Cutillo, JG: AUTHOR [+2]

Abstract

A method of producing cermet resistors on ceramic substrates is accomplished by the selective application of cermet on a substrate in the manner described as follows. A ceramic substrate surface is selectively coated with cermet material in those areas where resistors are to be formed. The cermet coating is applied as the first layer of metallurgy directly to the ceramic surface. The cermet resistor material is chrome silicon monoxide (Cr3Si/SiO2) applied to a nominal thickness of 500 Ao . The resistor pad is larger than the finished resistor size in order to provide the desired electrode contact area and reduce the dimensional sensitivity of the application process. The location of the "selective pad" is determined by the required position of the finished resistor. Each pad is one resistor.

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Mc/Cermet "Selective Pad" Resistor Process

A method of producing cermet resistors on ceramic substrates is accomplished by the selective application of cermet on a substrate in the manner described as follows. A ceramic substrate surface is selectively coated with cermet material in those areas where resistors are to be formed. The cermet coating is applied as the first layer of metallurgy directly to the ceramic surface. The cermet resistor material is chrome silicon monoxide (Cr3Si/SiO2) applied to a nominal thickness of 500 Ao . The resistor pad is larger than the finished resistor size in order to provide the desired electrode contact area and reduce the dimensional sensitivity of the application process. The location of the "selective pad" is determined by the required position of the finished resistor. Each pad is one resistor. Blanket layers of chrome/copper/chrome are applied successively, in situ over the "selective pad" used for the resistor. Photoresist is applied, then exposed and developed. The exposed Cr/Cu/Cr is etched to form the circuit lines and electrodes and the remaining resist is stripped. A new layer of resist is applied to the top chrome. The resist is exposed, developed and the top chrome is selectively etched to provide solderable surfaces on the circuit lines. The resist is then stripped, and the resistor is annealed. The substrate pins are then tinned, the resistor is trimmed to an exact value, and a standoff is created.

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