Browse Prior Art Database

Priority Encoders

IP.com Disclosure Number: IPCOM000040149D
Original Publication Date: 1987-Oct-01
Included in the Prior Art Database: 2005-Feb-01
Document File: 3 page(s) / 77K

Publishing Venue

IBM

Related People

Belliveau, MJ: AUTHOR [+2]

Abstract

A priority encoder is described in which any non-zero bit of a string of input bits may be assigned priority, instead of only the leftmost (highest-order) non-zero bit. The relaxed requirement for assigning priority translates into reduced gate requirements. A string of 16 input bits, A0 through A15 (high to low order), is used as an example. Each of the output bits of the encoded priority address, B0 through B4, as well as the predicted output parity BP, is independently implemented from the inputs. This assures that a single error in the logic will always cause only a single error among the outputs. (Image Omitted) In Fig. 1, the input bits are rearranged while leaving the truth table intact for detecting the leading zero. The rearrangement changes the priorities among the inputs.

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Priority Encoders

A priority encoder is described in which any non-zero bit of a string of input bits may be assigned priority, instead of only the leftmost (highest-order) non-zero bit. The relaxed requirement for assigning priority translates into reduced gate requirements. A string of 16 input bits, A0 through A15 (high to low order), is used as an example. Each of the output bits of the encoded priority address, B0 through B4, as well as the predicted output parity BP, is independently implemented from the inputs. This assures that a single error in the logic will always cause only a single error among the outputs.

(Image Omitted)

In Fig. 1, the input bits are rearranged while leaving the truth table intact for detecting the leading zero. The rearrangement changes the priorities among the inputs. The highest priority is assigned to A1, then to A3, etc., so as to obtain the indicated sequence of output addresses, top to bottom. As a result, bits B2 through B4 have fewer sequences of 1's and 0's, top to bottom, than with conventional priority A0, A1, etc., and therefore are simpler to implement. Fig. 2 shows the actual logic.

(Image Omitted)

The improved efficiency of the new priority encoder can also be applied to the case where the priority encoder must be a leading zeros detector of conventional priority. To do so, the number of leading zeros among the inputs is encoded into a code that retains the advantage of the new encoder and requires little extra gating to convert to binary.

(Image Omitted)

Fig. 3 shows an example of such a leading zeros detector. The 16 input bits are arranged in conventional order (high to low)...