Browse Prior Art Database

Efficient Paging to Provide Large Memory in a Small Address Space

IP.com Disclosure Number: IPCOM000040254D
Original Publication Date: 1987-Oct-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Rickard, DA: AUTHOR

Abstract

A technique is described whereby a read-only memory (ROM) addressing range, used in computer systems, is expanded from a single eight kilobytes of memory space to four eight kilobyte pages without replicating control code and data mapping information associated with such memory. Referring to the figure, a byte-wide memory is assumed. A page select register 10 determines which of the four pages will be active. An address comparator 12 selects a code/table memory 14 and disables decoder 16 whenever a memory address is below the address of the first data location in a plurality of data memories 18, 20, 22 and 24.

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Efficient Paging to Provide Large Memory in a Small Address Space

A technique is described whereby a read-only memory (ROM) addressing range, used in computer systems, is expanded from a single eight kilobytes of memory space to four eight kilobyte pages without replicating control code and data mapping information associated with such memory. Referring to the figure, a byte-wide memory is assumed. A page select register 10 determines which of the four pages will be active. An address comparator 12 selects a code/table memory 14 and disables decoder 16 whenever a memory address is below the address of the first data location in a plurality of data memories 18, 20, 22 and
24. Alternately, when the memory address is above the address of the first data location, the address comparator 12 enables the decoder 16 which, in response to the page select register 10, enables a selected one of the data memories 18, 20, 22 and 24. Thus, this technique utilizes the address comparator 12 in combination with the page select register 10 to maintain code and table transparency across page boundaries without replicating the code or table. The technique can be similarly applied to memory organizations where the code/table area is arbitrarily located in the memory space by appropriate changes in the address comparator 12.

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