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Electrostatic Discharge Test for Data Processor Synchronized With Processor Operation

IP.com Disclosure Number: IPCOM000040261D
Original Publication Date: 1987-Oct-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Herman, PA: AUTHOR [+3]

Abstract

When an electrostatic discharge takes place near a data processor, currents flow through the processor frame in an unpredictable pattern and produce voltages in conductors and circuit devices that may produce a machine error. An electrostatic discharge is conventionally applied to a processor frame to test whether the processor is adequately shielded. Because the electrostatic discharge requires a substantial amount of power, it is commonly generated from a 60-cycle utility power source and the discharges occur in synchronism with the utility power source but independently of the operations of the processor that is being tested. In this system the electrostatic discharge is produced by a fast switch and is timed to recur at a submultiple of the clock frequency of the device being tested.

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Electrostatic Discharge Test for Data Processor Synchronized With Processor Operation

When an electrostatic discharge takes place near a data processor, currents flow through the processor frame in an unpredictable pattern and produce voltages in conductors and circuit devices that may produce a machine error. An electrostatic discharge is conventionally applied to a processor frame to test whether the processor is adequately shielded. Because the electrostatic discharge requires a substantial amount of power, it is commonly generated from a 60-cycle utility power source and the discharges occur in synchronism with the utility power source but independently of the operations of the processor that is being tested. In this system the electrostatic discharge is produced by a fast switch and is timed to recur at a submultiple of the clock frequency of the device being tested. The circuit includes an adjustable delay for starting the discharge at a selected point within the submultiple frequency. The timing frequency and delay are selected to produce the discharge at a time when the processor is performing a particular switching operation that may be disturbed by the discharge.

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