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A Method for Storing Both Programs and Data in a 32-Bit Wide Microprogram Controller Memory

IP.com Disclosure Number: IPCOM000040496D
Original Publication Date: 1987-Nov-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Bouricius, WG: AUTHOR [+3]

Abstract

In a 32-bit microprocessor system, including a microprogram controller, a single small, local random-access memory (RAM) serves a dual use as both microprogram storage and system data storage -- the RAM having a respective section for each use. If the microprocessor requires data during the execution of a microprogram, the controller takes an unconditional subroutine jump to an address in the data section of RAM and pushes a return address on a stack. Prior to the jump, the current microprocessor instruction is latched by the hardware. Following the jump, the hardware causes a return instruction to be issued to the controller, which pops the return address from the stack and resumes the microprogram. Additional means are provided to allow multiple words of data to be processed before returning to the program.

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A Method for Storing Both Programs and Data in a 32-Bit Wide Microprogram Controller Memory

In a 32-bit microprocessor system, including a microprogram controller, a single small, local random-access memory (RAM) serves a dual use as both microprogram storage and system data storage -- the RAM having a respective section for each use. If the microprocessor requires data during the execution of a microprogram, the controller takes an unconditional subroutine jump to an address in the data section of RAM and pushes a return address on a stack. Prior to the jump, the current microprocessor instruction is latched by the hardware. Following the jump, the hardware causes a return instruction to be issued to the controller, which pops the return address from the stack and resumes the microprogram. Additional means are provided to allow multiple words of data to be processed before returning to the program. This is accomplished by loading a counter with a value which is dependent on the number of data words required by the microprocessor. For each data word required, the hardware increments the counter and causes continue instructions to be issued to the microprogram controller. At the last data word, a return instruction causes the controller to resume the microprogram. Means are also provided to read data from the microprocessor and store same into the RAM data section. The program has a priori knowledge of the microprocessor's data movement requirements during program execution. The dual use is further illustrated in the figure. The controller (UPC) sequences through sequential RAM addresses, until a branch is encountered. The RAM output provides the n...