Browse Prior Art Database

Low Thermal Resistance Package Design for Semiconductor Devices

IP.com Disclosure Number: IPCOM000040582D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Bansal, JP: AUTHOR

Abstract

A package to reduce the thermal resistance and improve the heat transfer from a chip to a module case is described in this article. Referring to Fig. 1, the key feature of this package is the heat transfer element 10, which provides a very low heat resistance path from the semiconductor chip 16 to the module cap 12. The heat transfer element 10, which is made of aluminum or brass or any other good heat-conducting material, is bonded inside the module cap 12 by spot welding or by crimping the case so that the case and the element make up one piece. This design approach can also be extended for use in multi-chip modules. The design of the element 10 is such that the element's fingers 14 come down and touch the top of the chip 16, when the case is assembled to a substrate 18, as shown in Fig. 2.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Low Thermal Resistance Package Design for Semiconductor Devices

A package to reduce the thermal resistance and improve the heat transfer from a chip to a module case is described in this article. Referring to Fig. 1, the key feature of this package is the heat transfer element 10, which provides a very low heat resistance path from the semiconductor chip 16 to the module cap 12. The heat transfer element 10, which is made of aluminum or brass or any other good heat-conducting material, is bonded inside the module cap 12 by spot welding or by crimping the case so that the case and the element make up one piece. This design approach can also be extended for use in multi-chip modules. The design of the element 10 is such that the element's fingers 14 come down and touch the top of the chip 16, when the case is assembled to a substrate 18, as shown in Fig. 2. Since the chip sizes are anywhere from 4X4 mm2 to greater than 10X10 mm2, alignment of the fingers 14 on the top of the chip is not a problem. The spring action in the fingers which touch the chip with a minimum amount of force can easily absorb the tolerance in the height of the chip's top from the top of the module cap 12. The element's finger tips 20 are curved up to provide a smooth contact between the element's fingers and the chip.

1

Page 2 of 2

2

[This page contains 3 pictures or other non-text objects]