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Infrared-Activated Selective Etching of P+ Silicon for Failure Analysis

IP.com Disclosure Number: IPCOM000040644D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Charles, JS: AUTHOR

Abstract

A reliable failure analysis technique is reported that combines infrared (IR) radiation with a silicon wet etch to delineate P+/Nboundaries for ion-implanted or diffusion dopant concentration related defects. Because of small size, turn-around time and complex processing conditions, visual inspection of DRAMs and dense logic chips requires appropriate physical diagnostic tools and techniques for fast detection of problems. An IR/wet etch technique, which can replace the silicon "dash etch" failure analysis method, affords better control when applied to 12 ohm-cm [100] P substrate wafers.

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Infrared-Activated Selective Etching of P+ Silicon for Failure Analysis

A reliable failure analysis technique is reported that combines infrared (IR) radiation with a silicon wet etch to delineate P+/Nboundaries for ion-implanted or diffusion dopant concentration related defects. Because of small size, turn- around time and complex processing conditions, visual inspection of DRAMs and dense logic chips requires appropriate physical diagnostic tools and techniques for fast detection of problems. An IR/wet etch technique, which can replace the silicon "dash etch" failure analysis method, affords better control when applied to 12 ohm-cm [100] P substrate wafers. The new method has been used successfully to diagnose extraneous diffusions, missing or partially missing gates due to polysilicon residual, gate spots due to N+ spots in the P doped region, substrate contact autodoping due to phosphosilicate glass (PSG) phosphorous outdiffusion, missing source/drain due to polysilicon-2 residual, ROX shorts and polysilicon misalignments. The apparatus shown in the figure is utilized to selectively remove P+ material while N+ material is left intact. The technique is performed at room temperature, and the reaction occurs within seconds. Wafers are stripped to the substrate and cleansed of all residual material before being subjected to an etch process. A solution 10 of HF:HNO3:CH3OOH in the ratio of 1:3:20 is prepared and placed in an appropriate container 11. A 250-watt inf...