Browse Prior Art Database

Dense Multi-Port Cell Scheme

IP.com Disclosure Number: IPCOM000040708D
Original Publication Date: 1987-Dec-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Loehlein, WD: AUTHOR [+2]

Abstract

A multi-port cell scheme is described which avoids simultaneous addressing if two or several port addresses access the same cell. For this purpose, read addresses A and B are fed to a compare means (Fig. 1) which supplies an inhibit signal in response to a match. The inhibit signal is used to deactivate the decoder for port B. This ensures that upon the occurrence of a common address at both inputs, only port A is selected. Such a circuit is easy to implement in an array, as generally there is an adequate number of redundant circuits that are suitable for this purpose, and each array word line is capable of being deactivated. Signals A INT and B INT are generated by the sense amplifier of each port. These signals are fed to a circuit (Fig. 2). Signal A INT is amplified directly to port A.

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Dense Multi-Port Cell Scheme

A multi-port cell scheme is described which avoids simultaneous addressing if two or several port addresses access the same cell. For this purpose, read addresses A and B are fed to a compare means (Fig. 1) which supplies an inhibit signal in response to a match. The inhibit signal is used to deactivate the decoder for port B. This ensures that upon the occurrence of a common address at both inputs, only port A is selected. Such a circuit is easy to implement in an array, as generally there is an adequate number of redundant circuits that are suitable for this purpose, and each array word line is capable of being deactivated. Signals A INT and B INT are generated by the sense amplifier of each port. These signals are fed to a circuit (Fig. 2). Signal A INT is amplified directly to port A. For INH = 0, signal B INT is transferred via two AND circuit inverters to port B, whereas for INH = 1, the path from A INT to port B is activated.

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