Browse Prior Art Database

Low Leakage Substrate Contact Structure

IP.com Disclosure Number: IPCOM000041050D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Penoyer, RF: AUTHOR

Abstract

A polysilicon guard ring placed around a semiconductor substrate contact to repel lateral migration of positive ions which may cause surface inversion leakage is reported.

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Low Leakage Substrate Contact Structure

A polysilicon guard ring placed around a semiconductor substrate contact to repel lateral migration of positive ions which may cause surface inversion leakage is reported.

The weak inversion of a substrate surface can lead to excessive leakage current to substrate contacts and inhibit the on chip substrate voltage (Vsub.) generator level.

Through the use of a polysilicon ring (P2) gating a recessed oxide (ROX) structures shown in the figure, a semiconductor surface path of weak inversion is interrupted and a leakage path to the metal one (M1) substrate contact to Vsub. generator is cut off. By controlling process cleanliness during early process steps when ROX structures are created, charge (Qss) contamination in the ROX is made sufficiently low so as to avoid a weak inversion. The gate of the ROX structure (polysilicon ring) can be biased slightly positive relative to the semiconductor surface so as to produce a stray electric field (E-) in the direction which will repel positive ions from the gated recessed oxide region. When high charge contamination levels are introduced in later process steps, i.e., metallization, PSG, packaging, etc., any tendency for silicon surface inversion is interrupted by utilizing the polysilicon ring structure. The polysilicon ring (P2) can be butted to the substrate contact (C2) if no bias is applied.

Disclosed anonymously.

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