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Controller Dynamic High Temperature Stress System for Integrated Circuits

IP.com Disclosure Number: IPCOM000041051D
Original Publication Date: 1987-Jun-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Martin, TR: AUTHOR [+3]

Abstract

A technique is described whereby an automated controlled dynamic high temperature stress system provides test qualification requirements for integrated circuits. The system is an improvement over prior configurations which were manually configured and required visual oscilloscope readings.

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Controller Dynamic High Temperature Stress System for Integrated Circuits

A technique is described whereby an automated controlled dynamic high temperature stress system provides test qualification requirements for integrated circuits. The system is an improvement over prior configurations which were manually configured and required visual oscilloscope readings.

The system uses a personal computer (PC) to load static random access memory (RAM) circuits with dynamic test vectors, as integrated circuits are processed for temperature stress testing. The PC is used to control circuits which electronically drive the integrated circuits and monitor the testing operation by comparing outputs with internally stored patterns. This enables the PC to monitor the stress testing operation on a full time basis.

The system, as shown in the figure, consists of PC 10, standard interface bus 11, chamber controllers 12, interface circuit cards 13 for recording the test results on the printer, driver circuit cards 14 for driving the circuits under temperature stress testing and circuit load boards 15.

Disclosed anonymously.

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