Browse Prior Art Database

Poly Base Contact Etch Process

IP.com Disclosure Number: IPCOM000041276D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Ahlgren, DCE: AUTHOR [+2]

Abstract

Reactive ion etching at poly base contact opening can lead to bumpy polysilicon. Proposed here is a reactive ion etch (RIE) plus a wet etch process to eliminate bumpy polysilicon. The process can be plush modified to provide an end-point detection (EPD) site for the RIE etch. This end-point detection site is necessary for maintaining good etch bias control. Fig. 1 shows the process after reach-through reoxidation. Modification of the reach-through reoxidation to give 650 ˜ oxide over the diffusion regions will provide an end-point etch site for the RIE etch. This is explained below. 1. Apply "x" level PR (photoresist). 2. Implant resistor. 3. Strip PR (see Fig. 1) 4. CVD (chemical vapor deposit) underlay 1200 ˜oxide and clean. 5. Densify oxide 800 C, N2, 30 minutes. 6.

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Poly Base Contact Etch Process

Reactive ion etching at poly base contact opening can lead to bumpy polysilicon. Proposed here is a reactive ion etch (RIE) plus a wet etch process to eliminate bumpy polysilicon. The process can be plush modified to provide an end-point detection (EPD) site for the RIE etch. This end-point detection site is necessary for maintaining good etch bias control. Fig. 1 shows the process after reach-through reoxidation. Modification of the reach-through reoxidation to give 650 ~ oxide over the diffusion regions will provide an end-point etch site for the RIE etch. This is explained below. 1. Apply "x" level PR (photoresist). 2. Implant resistor. 3. Strip PR (see Fig. 1) 4. CVD (chemical vapor deposit) underlay 1200 ~oxide and clean. 5. Densify oxide 800 C, N2, 30 minutes. 6. Apply "y" level PR - open oxide over N+ area in fiducial, as in Fig. 2. 7. RIE to end point (see Fig. 3).
8. Ash PR and post clean - note the device area still has an oxide coating during ashing (see Fig. 3). 9. Polysilicon deposition preclean. 10. Wet etch 200 SiO2 prior to polysilicon deposition. 11. Deposit base polysilicon over entire wafer. Note that the 200 ~ oxide is removed at step 10. Step 11 deposits polysilicon uniformly on the entire wafer.

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