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High Performance Output Select Circuit

IP.com Disclosure Number: IPCOM000041304D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Barry, RL: AUTHOR [+2]

Abstract

This article describes a circuit which provides for the selection and deselection of an output driver circuit. The circuit uses collector dotted current switches to provide a logical OR function and uses a current switch with a constant current source to deselect the output driver. This circuit offers greatly reduced sensitivity to power supply and improved performance. Referring to the drawing, the circuit operates as follows. If input A is down and input B is up, transistors T1 and T3 will be turned off. This will result in node D going to an up level. This will bring the emitter follower output (node E) to an up level, turning on T7 and turning off T8. With T8 off, no current is drawn from the output driver and it is therefore selected.

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High Performance Output Select Circuit

This article describes a circuit which provides for the selection and deselection of an output driver circuit. The circuit uses collector dotted current switches to provide a logical OR function and uses a current switch with a constant current source to deselect the output driver. This circuit offers greatly reduced sensitivity to power supply and improved performance. Referring to the drawing, the circuit operates as follows. If input A is down and input B is up, transistors T1 and T3 will be turned off. This will result in node D going to an up level. This will bring the emitter follower output (node E) to an up level, turning on T7 and turning off T8. With T8 off, no current is drawn from the output driver and it is therefore selected. If input A is up or input B is down, either T1 or T3 will be turned on, which will pull nodes D and E to a down level, turn on T8 and turn off T7. The current drawn through T8 will deselect the output driver. The voltage at node D is controlled by the clamp comprised of T5, R1 and R2. With this circuit the current pulled from the output driver will be controlled by the constant current source J3. This results in improved access time and better control of the chip output levels. This second stage current switch accomplishes powering up and level shifting, while greatly reducing the effect of Miller capacitance and directly driving the output driver.

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