Browse Prior Art Database

Driver Circuit With Controlled Output Up-Level

IP.com Disclosure Number: IPCOM000041306D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Culican, EF: AUTHOR [+3]

Abstract

The driver circuit employs a Vc (5 V) and Vb (1.7 V) supply. A clamp is utilized to maintain the desired driver output up-level. The clamp comprises transistors T1, T2 connected in series between the base of the Darlington output (B) and the supply Vb . This clamp utilizes transistor tracking to maintain the driver up-level output at approximately Vb even with process variation. The circuit also includes an AC clamp and a tri-state control. When the tri-state input is high, the driver functions normally. When the tri-state input is low, the two output devices T3 and T4 are shut off by forcing nodes A and B low. The AC clamp improves performance by limiting and discharging any overshoot which may occur during the rising transition of the driver output.

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Driver Circuit With Controlled Output Up-Level

The driver circuit employs a Vc (5 V) and Vb (1.7 V) supply. A clamp is utilized to maintain the desired driver output up-level. The clamp comprises transistors T1, T2 connected in series between the base of the Darlington output (B) and the supply Vb . This clamp utilizes transistor tracking to maintain the driver up-level output at approximately Vb even with process variation. The circuit also includes an AC clamp and a tri-state control. When the tri-state input is high, the driver functions normally. When the tri-state input is low, the two output devices T3 and T4 are shut off by forcing nodes A and B low. The AC clamp improves performance by limiting and discharging any overshoot which may occur during the rising transition of the driver output.

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