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Improvements in Centering Circuits

IP.com Disclosure Number: IPCOM000041312D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Orengo, G: AUTHOR [+2]

Abstract

A centering circuit associated with a buffer capacitor, a charge circuit, and two power-failure command controlled driver switches are widely used in the art, in order to provide symmetrical voltages to a load. Fig. 1 depicts on overall schematic view of the circuitry. In normal mode, the buffer capacitor C is charged by the charge circuit, and driver switches S1 and S2 are opened which cause the centering circuit to be inactive. In the failure mode, say, when a power failure occurs, the buffer capacitor discharges in its load, through driver switches S1 and S2, now closed, the centering circuit being active. The centering circuit, like the one shown in Fig.

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Improvements in Centering Circuits

A centering circuit associated with a buffer capacitor, a charge circuit, and two power-failure command controlled driver switches are widely used in the art, in order to provide symmetrical voltages to a load. Fig. 1 depicts on overall schematic view of the circuitry. In normal mode, the buffer capacitor C is charged by the charge circuit, and driver switches S1 and S2 are opened which cause the centering circuit to be inactive. In the failure mode, say, when a power failure occurs, the buffer capacitor discharges in its load, through driver switches S1 and S2, now closed, the centering circuit being active. The centering circuit, like the one shown in Fig. 2, which is standard, measures the potential at point E, and according to its value increases or decreases the potential of the positive pole of the buffer capacitor, in order to center the potential across the capacitor, around ground, in others words it assures that V(C+) = - V(C-). Although this circuit has definite advantages, such as it can be either charged (e.g., + 10 V, + 5 mA) or discharged (e.g., + 8 V, - 10 mA) dissymmetrically, the buffer capacitor will still be used, when required, as a symmetric (e.g., + 7 V, - 7 V) back-up power supply. It is also to be noted that the load is connected only during power failure. However, this circuit exhibits some drawbacks. Firstly, it needs two driver switches S1 and S2 which are in fact medium current analog switches because they handle load currents (in the range of 10 mA). This means that the power available for the load is smaller than the power stored in the buffer capacitor due to: - the voltage drop through the analog switch, and - the current loss from biasing this analog switch. This may not be negligible. For example, in medium voltage technology, the voltage drop may be as high as approximately 1 Volt (to be compared with usual 3 to 5 Volts capacitor discharge) and on the other hand current loss is about 1/10 to 1/5 of current needed by the load. Secondly, a voltage doubler circuit is generally used as a charge circuit (as represented in Fig. 1), because this solution presents some additional advantages. It allows higher voltages across the buffer capacitor which in turn results in greater current in the load in case of power failure. If the failure of both V+ and V- power supplies occurs simultaneously, one may notice that the buffer capacitor is really floating and the centering circuit operates satisfactorily. Unfortunately, when only one of the tw...