Browse Prior Art Database

Interactive Service Hardware Diagnostics

IP.com Disclosure Number: IPCOM000041359D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Stranko, TA: AUTHOR

Abstract

In typical computer systems which use LSSD (level sensitive scan design) it is advantageous to use the scan hardware for maintenance and/or diagnostic requirements rather than to build in an entirely new diagnostic interface. Since this LSSD hardware powers on to an undefined state, it has been a practice to implement a special adapter to the service processor (MSC) that has the capability of initializing all the maintenance logic. This maintenance logic, or logic support station (LSS), is within the mainframe and is also of an LSSD design. It performs a comparable function for the processing logic within the central electronics complex. The special adpater performs a variety of functions but one of its primary ones is initialization of LSSs. This unfortunately costs the adapter a substantial amount of hardware.

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Interactive Service Hardware Diagnostics

In typical computer systems which use LSSD (level sensitive scan design) it is advantageous to use the scan hardware for maintenance and/or diagnostic requirements rather than to build in an entirely new diagnostic interface. Since this LSSD hardware powers on to an undefined state, it has been a practice to implement a special adapter to the service processor (MSC) that has the capability of initializing all the maintenance logic. This maintenance logic, or logic support station (LSS), is within the mainframe and is also of an LSSD design. It performs a comparable function for the processing logic within the central electronics complex. The special adpater performs a variety of functions but one of its primary ones is initialization of LSSs. This unfortunately costs the adapter a substantial amount of hardware. It must have a shift register, counters for bits shifted, scan clock generator, and control logic that drives and checks the operation. On the other hand, the mainframe LSSs already have all this hardware built into them because of the amount of LSSD hardware they must support. Therefore, an alternative design is to have one LSS able to scan another by the addition of an extra port to each LSS. As shown in the drawing, each LSS would then have a scan path to another such that A scans B, B scans C, and C scans A. With this alternative, each LSS has a diagnostic scan capability for another LSS, thus eliminating the r...