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On-Chip Control Circuit for High Positive and Negative Voltages

IP.com Disclosure Number: IPCOM000041366D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 3 page(s) / 47K

Publishing Venue

IBM

Related People

Cranford, HC: AUTHOR [+3]

Abstract

This article describes a circuit which enables high voltages (positive and/or negative) to be switched on an integrated circuit chip without damage to the devices on the chip. Such circuits are particularly suited for use in an alterable read-only chip where different voltage levels are required for establishing different operating modes. The figure shows the circuit which coacts with select decode circuitry (not shown) to establish a plurality of operating states. In order to write and/or read a floating gate device (not shown), a large positive voltage and a large negative voltage are needed at node 1. Particularly, a large positive voltage is needed to erase the device, while a large negative voltage is needed to write the device.

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On-Chip Control Circuit for High Positive and Negative Voltages

This article describes a circuit which enables high voltages (positive and/or negative) to be switched on an integrated circuit chip without damage to the devices on the chip. Such circuits are particularly suited for use in an alterable read-only chip where different voltage levels are required for establishing different operating modes. The figure shows the circuit which coacts with select decode circuitry (not shown) to establish a plurality of operating states. In order to write and/or read a floating gate device (not shown), a large positive voltage and a large negative voltage are needed at node 1. Particularly, a large positive voltage is needed to erase the device, while a large negative voltage is needed to write the device. The resistors R1 and R2 are polysilicon resistors which are used as a voltage divider and establish the desired voltage at node 1. The program/ erase (P/E) line supplies a large positive voltage (around 8-20 volts) during erase. A programming voltage of around -8 volts is supplied during writing. The HV1 and HV2 supplies are also high voltages (greater than 10 volts). These high voltages make it necessary to protect devices 1 and 2 against junction breakdown. Thus, a protect gate (2') is used at node 2. Also, device 4 is added to protect device 5. Device 4 is turned on with 5 volts on its gate. Therefore, node 4 charges to only a threshold above 5 volts. For example, for a HV2 value of 13 volts, node 3 is charged to 13 volts and node 4 goes to a threshold above 5 volts or about 7 volts. Device 4 sees 6 volts across it, and device 5 sees 7 volts across it. These are safe levels and will not damage the devices. Chip select (CS) and array store are logical signals on the chip. The signals are used to control the circuit for each of its three states. The three states are: (1) erasing the chip select floating gate device; (2) programming a chip select; and
(3) programming the arrays without altering the chip's

select data. In this application the complement of Array Store is used. The operation of the circuit for each of the aforeme...